参数资料
型号: ADV7123KSTZ50
厂商: Analog Devices Inc
文件页数: 3/24页
文件大小: 0K
描述: IC DAC VIDEO 3-CH 50MHZ 48LQFP
产品培训模块: Data Converter Fundamentals
DAC Architectures
标准包装: 1
位数: 10
数据接口: 并联
转换器数目: 3
电压电源: 单电源
功率耗散(最大): 30mW
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 托盘
输出数目和类型: 6 电流,单极
采样率(每秒): 50M
产品目录页面: 786 (CN2011-ZH PDF)
ADV7123
Rev. D | Page 11 of 24
Pin No.
Mnemonic
Description
37
RSET
A resistor (RSET) connected between this pin and GND controls the magnitude of the full-scale video signal.
Note that the IRE relationships are maintained, regardless of the full-scale output current. For nominal video
levels into a doubly terminated 75 Ω load, RSET = 530 Ω. The relationship between RSET and the full-scale
output current on IOG (assuming ISYNC is connected to IOG) is given by:
RSET (Ω) = 11,445 × VREF (V)/IOG (mA)
The relationship between RSET and the full-scale output current on IOR, IOG, and IOB is given by:
IOG (mA) = 11,445 × VREF (V)/RSET (Ω) (SYNC being asserted)
IOR, IOB (mA) = 7989.6 × VREF (V)/RSET (Ω)
The equation for IOG is the same as that for IOR and IOB when SYNC is not being used, that is, SYNC tied
permanently low.
38
PSAVE
Power Save Control Pin. Reduced power consumption is available on the ADV7123 when this pin is active.
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