参数资料
型号: ADV7321KSTZ
厂商: Analog Devices Inc
文件页数: 10/88页
文件大小: 0K
描述: IC VID ENC 6-12BIT DAC'S 64LQFP
标准包装: 1
类型: 视频编码器
应用: EVD,DVD,SD/PS/HDTV
电压 - 电源,模拟: 2.5V
电压 - 电源,数字: 2.5V
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘
ADV7320/ADV7321
Rev. A | Page 18 of 88
Pin No.
Mnemonic
Input/Output
Description
62 to 58,
55 to 51
S9 to S0
I
SD or PS/HDTV Input Port for Cr[Red/V] Data in 4:4:4 Input Mode. LSB is set up on Pin S0. For
8-bit data input, LSB is set up on Pin S2.
33
RESET
I
This input resets the on-chip timing generator and sets the ADV7320/ADV7321 into default
register setting. RESET is an active low signal.
47, 35
RSET1, RSET2
I
A 3040 Ω resistor must be connected from this pin to AGND and is used to control the
amplitudes of the DAC outputs.
22
SCLK
I
I2C Port Serial Interface Clock Input.
21
SDA
I/O
I2C Port Serial Data Input/Output.
20
ALSB
I
TTL Address Input. This signal sets up the LSB of the I2C address. When this pin is tied low, the
I2C filter is activated, which reduces noise on the I2C interface.
1
VDD_IO
P
Power Supply for Digital Inputs and Outputs.
10, 56
VDD
P
Digital Power Supply.
41
VAA
P
Analog Power Supply.
46
VREF
I/O
Optional External Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
34
EXT_LF
I
External Loop Filter for the Internal PLL.
31
RTC_SCR_TR
I
Multifunctional Input. Real-time control (RTC) input, timing reset input, subcarrier reset input.
19
I2C
I
This input pin must be tied high (VDD_IO) for the ADV7320/ADV7321 to interface over the I2C port.
64
GND_IO
Digital Input/Output Ground.
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