参数资料
| 型号： | ADV7343BSTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 74/108页 |
| 文件大小： | 0K |
| 描述： | IC ENCODER VIDEO W/DAC 64-LQFP |
| 产品变化通告： | ADV734x, ADV739x Feature Improvement |
| 标准包装： | 1 |
| 类型： | 视频编码器 |
| 应用： | DVD，Blu-Ray |
| 电压 - 电源，模拟： | 3.3V |
| 电压 - 电源，数字： | 1.8V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
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ADV7342/ADV7343
Data Sheet
Rev. | Page 68 of 108
EXTERNAL HORIZONTAL AND VERTICAL SYNCHRONIZATION CONTROL
For timing synchronization purposes, the ADV7342/ADV7343 are able to accept either EAV/SAV time codes embedded in the input
pixel data or external synchronization signals provided on the S_HSYNC, S_VSYNC, P_HSYNC, P_VSYNC, and P_BLANK pins (see
Table 54). It is also possible to output synchronization signals on the S_HSYNC and S_VSYNC pins (see Table 55 to Table 57).
Table 54. Timing Synchronization Signal Input Options
Signal
Pin
Condition
SD HSYNC In
S_HSYNC
SD slave timing mode (1, 2, or 3) selected (Subaddress 0x8A[2:0])1
SD VSYNC/FIELD In
S_VSYNC
SD slave timing mode (1, 2, or 3) selected (Subaddress 0x8A[2:0])1
ED/HD HSYNC In
P_HSYNC
ED/HD timing synchronization inputs enabled (Subaddress 0x30, Bit 2 = 0)
ED/HD VSYNC/FIELD In
P_VSYNC
ED/HD timing synchronization inputs enabled (Subaddress 0x30, Bit 2 = 0)
ED/HD BLANK In
P_BLANK
1
SD and ED/HD timing synchronization outputs must also be disabled (Subaddress 0x02[7:6] = 00).
Table 55. Timing Synchronization Signal Output Options
Signal
Pin
Condition
SD HSYNC Out
S_HSYNC
SD timing synchronization outputs enabled (Subaddress 0x02, Bit 6 = 1)1
SD VSYNC/FIELD Out
S_VSYNC
SD timing synchronization outputs enabled (Subaddress 0x02, Bit 6 = 1)1
ED/HD HSYNC Out
S_HSYNC
ED/HD timing synchronization outputs enabled (Subaddress 0x02, Bit 7 = 1)
ED/HD VSYNC/FIELD Out
S_VSYNC
ED/HD timing synchronization outputs enabled (Subaddress 0x02, Bit 7 = 1)
1
ED/HD timing synchronization outputs must also be disabled (Subaddress 0x02, Bit 7 = 0).
Table 56. S_HSYNC Output Control1,2
ED/HD Input Sync
Format
(Subaddress
0x30, Bit 2)
ED/HD HSYNC
Control
(Subaddress
0x34, Bit 1)
ED/HD Sync
Output Enable
(Subaddress
0x02, Bit 7)
SD Sync
Output Enable
(Subaddress
0x02, Bit 6)
Signal on S_HSYNC Pin
Duration
X
0
Tristate
N/A
X
0
1
Pipelined SD HSYNC
See the
SD Timing section.
0
1
X
Pipelined ED/HD HSYNC
As per HSYNC timing.
1
0
1
X
Pipelined ED/HD HSYNC based on
AV Code H bit
Same as line blanking
interval.
X
1
X
Pipelined ED/HD HSYNC based on
horizontal counter
Same as embedded
HSYNC.
1
In all ED/HD standards where there is an HSYNC output, the start of the HSYNC pulse is aligned with the falling edge of the embedded HSYNC in the output video.
2
X = don’t care.
D
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| ADV7343WBSTZ | 功能描述:IC ENCODER VID 12BIT DAC 64LQFP 制造商:analog devices inc. 系列:- 包装:托盘 零件状态:在售 类型:视频编码器 应用:DVD，Blu-Ray 电压 - 电源，模拟:2.6 V ~ 3.46 V 电压 - 电源，数字:1.71 V ~ 1.89 V 安装类型:表面贴装 封装/外壳:64-LQFP 供应商器件封装:64-LQFP（10x10） 标准包装:1 |
| ADV7343WBSTZ-RL | 功能描述:Video Encoder IC DVD, Blu-Ray 64-LQFP (10x10) 制造商:analog devices inc. 系列:- 包装:带卷（TR） 零件状态:有效 类型:视频编码器 应用:DVD，Blu-Ray 电压 - 电源，模拟:2.6 V ~ 3.46 V 电压 - 电源，数字:1.71 V ~ 1.89 V 安装类型:表面贴装 封装/外壳:64-LQFP 供应商器件封装:64-LQFP（10x10） 标准包装:1,500 |
| ADV7344 | 制造商:AD 制造商全称:Analog Devices 功能描述:Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs |
| ADV7344BSTZ | 制造商:Analog Devices 功能描述: |
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