参数资料
型号: AGLN250V5-CSG81I
厂商: Microsemi SoC
文件页数: 50/150页
文件大小: 0K
描述: IC FPGA NANO 1KB 250K 81-CSP
标准包装: 640
系列: IGLOO nano
逻辑元件/单元数: 6144
RAM 位总计: 36864
输入/输出数: 60
门数: 250000
电源电压: 1.425 V ~ 1.575 V
安装类型: 表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 81-WFBGA,CSBGA
供应商设备封装: 81-CSP(5x5)
IGLOO nano Low Power Flash FPGAs
Revision 17
5-3
Revision 10
(Apr 2010)
References to differential inputs were removed from the datasheet, since IGLOO nano
devices do not support differential inputs (SAR 21449).
N/A
A parenthetical note, "hold previous I/O state in Flash*Freeze mode," was added to each
occurrence of bus hold in the datasheet (SAR 24079).
N/A
programming.
The note connected with the "IGLOO nano Ordering Information" table was revised to
clarify features not available for Z feature grade devices.
The definition of C in the "Temperature Grade Offerings" table was changed to "extended
commercial temperature range."
1.2 V wide range was added to the list of voltage ranges in the "I/Os with Advanced I/O
switching from 1.2 V to 1.5 V core voltage for in-system programming. The VJTAG
voltage was changed from "1.425 to 3.6" to "1.4 to 3.6" (SAR 24052). The note regarding
voltage for programming V2 and V5 devices was revised (SAR 25213). The maximum
value for VPUMP programming voltage (operation mode) was changed from 3.45 V to
3.6 V (SAR 25220).
The tables in the "Quiescent Supply Current" section were updated (SAR 24882 and
SAR 24112).
IGLOO nano Sleep Mode* (SARs 24112, 24882, and 79503).
The note stating what was included in IDD was removed from Table 2-11 Quiescent
VCCI or VJTAG bank" was removed from Table 2-12 Quiescent Supply Current (IDD),
No IGLOO nano Flash*Freeze Mode1. The note giving IDD was changed to "IDD =
NBANKS * ICCI + ICCA."
Default I/O Software Settings1 were updated. Wide range support information was
added.
Revision
Changes
Page
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