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参数资料
| 型号： | AN1568 |
| 厂商： | ON SEMICONDUCTOR |
| 英文描述： | Interfacing Between LVDS and ECL |
| 中文描述： | 接口之间的LVDS和ECL |
| 文件页数： | 8/10页 |
| 文件大小： | 88K |
| 代理商： | AN1568 |
AN1568/D
http://onsemi.com
8
Figure 19. PSPICE Simulated Voltage Levels of
5 V PECL to LVDS Interface with Example Resistor
Values
1.07 V
1.34 V
4.05 V
3.25 V
800 mV
270 mV
LVDS
5 V PECL
V
CM
(PECL)
V
CM
(LVDS)
Interfacing from +3.3 V LVDS to +5.0 V PECL
To translate LVDS signals to PECL a differential ECL
device with extended common mode range inputs (See
Table 4) can be used to process and translate LVDS signals
when supplied with 5.0 V
(See Figure 20)
5% supply voltage.
Figure 20. Interfacing LVDS to PECL
5 V
LVDS
Z = 50
Z = 50
100
PECL
3.3 V
R
T
R
T
Interfacing Between NECL to LVDS
ON Semiconductor has developed level translators to
interface between the different voltage levels. The
MC100EP90 translates from negative supplied ECL to
LVPECL. The interface from LVPECL to LVDS inputs is
described above. (Figure 21)
Figure 21. Interfacing from NECL to LVDS
NECL
MC100EL90
or
MC100EP90
LVPECL
Interface
LVPECL to
LVDS
LVDS
3.3 V
3.3 V
LVPECL
3.3 V, 4.5 V
or 5.2 V
3.3 V, 4.5 V
or 5.2 V
GND
R
T
R
T
To interface from LVDS to negative supplied ECL the
common mode range (V
IHCMR
) of the MC100LVEL91 for
–3.3 V supply and the MC100EL91 for –4.5 V/–5.2 V
supply is wide enough to process LVDS signals.
(See Figure 22)
If V
CC
= +5 V
supply is available the MC10E1651 can be used.
5% supply and a V
EE
= –5.2 V
±
5%
3.3 V
Figure 22. Interfacing from LVDS to NECL
LVDS
Z = 50
Z = 50
100
LVEL91
or
LVEP91
3.3 V
LVEL91: 3.3 V,
EL91: 4.5 V, 5.2 V
NECL
GND
R
T
R
T
3.3 V, 4.5 V, or 5.2 V
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