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参数资料
型号： APA1000-FG1152
厂商： Microsemi SoC
文件页数： 1/178页
文件大小： 0K
描述： IC FPGA PROASIC+ 1M 1152-FBGA
标准包装： 24
系列： ProASICPLUS
RAM 位总计： 202752
输入/输出数： 712
门数： 1000000
电源电压： 2.3 V ~ 2.7 V
安装类型： 表面贴装
工作温度： 0°C ~ 70°C
封装/外壳： 1152-BGA
供应商设备封装： 1152-FPBGA（35x35）
December 2009
i
2009 Actel Corporation
See the Actel website for the latest version of the datasheet.
v5.9
ProASICPLUS Flash Family FPGAs
Features and Benefits
High Capacity
Commercial and Industrial
75,000 to 1 Million System Gates
27 K to 198 Kbits of Two-Port SRAM
66 to 712 User I/Os
Military
300, 000 to 1 Million System Gates
72 K to 198 Kbits of Two Port SRAM
158 to 712 User I/Os
Reprogrammable Flash Technology
0.22 m 4 LM Flash-Based CMOS Process
Live At Power-Up (LAPU) Level 0 Support
Single-Chip Solution
No Configuration Device Required
Retains Programmed Design during Power-Down/Up Cycles
Mil/Aero Devices Operate over Full Military Temperature
Range
Performance
3.3 V, 32-Bit PCI, up to 50 MHz (33 MHz over military
temperature)
Two Integrated PLLs
External System Performance up to 150 MHz
Secure Programming
The Industry’s Most Effective Security Key (FlashLock)
Low Power
Low Impedance Flash Switches
Segmented Hierarchical Routing Structure
Small, Efficient, Configurable (Combinatorial or Sequential)
Logic Cells
High Performance Routing Hierarchy
Ultra-Fast Local and Long-Line Network
High-Speed Very Long-Line Network
High-Performance, Low Skew, Splittable Global Network
100% Routability and Utilization
I/O
Schmitt-Trigger Option on Every Input
2.5 V / 3.3 V Support with Individually-Selectable Voltage
and Slew Rate
Bidirectional Global I/Os
Compliance with PCI Specification Revision 2.2
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) Compliant
Pin-Compatible Packages across the ProASICPLUS Family
Unique Clock Conditioning Circuitry
PLL
with
Flexible
Phase,
Multiply/Divide,
and
Delay
Capabilities
Internal and/or External Dynamic PLL Configuration
Two LVPECL Differential Pairs for Clock or Data Inputs
Standard FPGA and ASIC Design Flow
Flexibility with Choice of Industry-Standard Front-End Tools
Efficient Design through Front-End Timing and Gate
Optimization
ISP Support
In-System Programming (ISP) via JTAG Port
SRAMs and FIFOs
SmartGen Netlist Generation Ensures Optimal Usage of
Embedded Memory Blocks
24 SRAM and FIFO Configurations with Synchronous and
Asynchronous Operation up to 150 MHz (typical)
Table 1 ProASICPLUS Product Profile
Device
APA075
APA150
APA3001
APA450
APA6001
APA750
APA10001
Maximum System Gates
75,000
150,000
300,000
450,000
600,000
750,000
1,000,000
Tiles (Registers)
3,072
6,144
8,192
12,288
21,504
32,768
56,320
Embedded RAM Bits (k=1,024 bits)
27 k
36k
72 k
108 k
126 k
144 k
198 k
Embedded RAM Blocks (256x9)
12
16
32
48
56
64
88
LVPECL
222
2
PLL
222
2
Global Networks
4
Maximum Clocks
24
32
48
56
64
88
Maximum User I/Os
158
242
290
344
454
562
712
JTAG ISP
Yes
PCI
Yes
Package (by pin count)
TQFP
100, 144
100
–
PQFP
208
PBGA
–
456
FBGA
144
144, 256
144, 256, 484
256, 484, 676
676, 896
896, 1152
CQFP2
208, 352
CCGA/LGA2
624
Notes:
1. Available as Commercial/Industrial and Military/MIL-STD-883B devices.
2. These packages are available only for Military/MIL-STD-883B devices.
v5.9
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APA1000-FG1152I 功能描述:IC FPGA PROASIC+ 1M 1152-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75）
APA1000-FG896 功能描述:IC FPGA PROASIC+ 1M 896-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75）
APA1000-FG896A 功能描述:IC FPGA PROASIC+ 1M 896-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75）
APA1000-FG896I 功能描述:IC FPGA PROASIC+ 1M 896-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75）
APA1000-FG896M 制造商:Microsemi Corporation 功能描述:FPGA ProASICPLUS Family 1M Gates 180MHz 0.22um (CMOS) Technology 2.5V 896-Pin FBGA 制造商:Microsemi Corporation 功能描述:FPGA ProASICPLUS Family 1M Gates 180MHz 0.22um Technology 2.5V 896-Pin FBGA 制造商:Microsemi Corporation 功能描述:FPGA PROASICPLUS 1M GATES 180MHZ 0.22UM 2.5V 896FBGA - Trays
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