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参数资料
型号： APA450-FG484A
厂商： Microsemi SoC
文件页数： 146/178页
文件大小： 0K
描述： IC FPGA PROASIC+ 450K 484-FBGA
标准包装： 40
系列： ProASICPLUS
RAM 位总计： 110592
输入/输出数： 344
门数： 450000
电源电压： 2.375 V ~ 2.625 V
安装类型： 表面贴装
工作温度： -40°C ~ 125°C
封装/外壳： 484-BGA
供应商设备封装： 484-FPBGA（23x23）
ProASICPLUS Flash Family FPGAs
v5.9
1-3
Live at Power-Up
The Actel flash-based ProASICPLUS devices support
Level 0 of the live at power-up (LAPU) classification
standard. This feature helps in system component
initialization,
executing
critical
tasks
before
the
processor wakes up, setting up and configuring memory
blocks, clock generation, and bus activity management.
The LAPU feature of flash-based ProASICPLUS devices
greatly simplifies total system design and reduces total
system cost, often eliminating the need for complex
programmable logic device (CPLD) and clock generation
PLLs that are used for this purpose in a system. In
addition, glitches and brownouts in system power will
not corrupt the ProASICPLUS device's flash configuration,
and unlike SRAM-based FPGAs, the device will not have
to be reloaded when system power is restored. This
enables the reduction or complete removal of the
configuration
PROM,
expensive
voltage
monitor,
brownout detection, and clock generator devices from
the PCB design. Flash-based ProASICPLUS devices simplify
total system design, and reduce cost and design risk,
while increasing system reliability and improving system
initialization time.
Flash Switch
Unlike SRAM FPGAs, ProASICPLUS uses a live-at-power-up
ISP flash switch as its programming element.
In the ProASICPLUS flash switch, two transistors share the
floating
gate,
which
stores
the
programming
information. One is the sensing transistor, which is only
used for writing and verification of the floating gate
voltage. The other is the switching transistor. It can be
used in the architecture to connect/separate routing nets
or to configure logic. It is also used to erase the floating
gate (Figure 1-2 on page 1-2).
Logic Tile
The logic tile cell (Figure 1-3) has three inputs (any or all
of which can be inverted) and one output (which can
connect to both ultra-fast local and efficient long-line
routing resources). Any three-input, one-output logic
function (except a three-input XOR) can be configured as
one tile. The tile can be configured as a latch with clear
or set or as a flip-flop with clear or set. Thus, the tiles can
flexibly map logic and sequential gates of a design.
Figure 1-3 Core Logic Tile
Local Routing
In 1
In 2 (CLK)
In 3 (Reset)
Efficient Long-Line Routing
相关PDF资料
PDF描述
APA450-FGG484A IC FPGA PROASIC+ 450K 484-FBGA
5CGXFC7C7F23C8NES IC CYCLONE V FPGA 150K 484-FBGA
A42MX36-FPQ208 IC FPGA MX SGL CHIP 54K 208-PQFP
A42MX36-FPQG208 IC FPGA MX SGL CHIP 54K 208-PQFP
EP4CGX75CF23I7 IC CYCLONE IV GX FPGA 75K 484FBG
相关代理商/技术参数
参数描述
APA450-FG484I 功能描述:IC FPGA PROASIC+ 450K 484-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 产品培训模块:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色产品:Cyclone? IV FPGAs 标准包装:60 系列:CYCLONE® IV GX LAB/CLB数:9360 逻辑元件/单元数:149760 RAM 位总计:6635520 输入/输出数:270 门数:- 电源电压:1.16 V ~ 1.24 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:484-BGA 供应商设备封装:484-FBGA（23x23）
APA450-FG896A 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:Automotive-Grade ProASIC Flash Family FPGAs
APA450-FGB 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA450-FGES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA450-FGG144 功能描述:IC FPGA PROASIC+ 450K 144-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 产品培训模块:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色产品:Cyclone? IV FPGAs 标准包装:60 系列:CYCLONE® IV GX LAB/CLB数:9360 逻辑元件/单元数:149760 RAM 位总计:6635520 输入/输出数:270 门数:- 电源电压:1.16 V ~ 1.24 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:484-BGA 供应商设备封装:484-FBGA（23x23）
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