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参数资料
| 型号： | ARM7TDMI |
| 厂商： | ATMEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Embedded RISC Microcontroller Core(32位嵌入式RISC微控制器) |
| 中文描述： | 32-BIT, RISC MICROCONTROLLER, PBGA256 |
| 文件页数： | 1/5页 |
| 文件大小： | 27K |
| 代理商： | ARM7TDMI |
1
Features
32-bit RISC architecture
Two instruction sets:
– ARM high-performance 32-bit instruction set
– Thumb high-code-density 16-bit instruction set
Very low power consumption: Industry-leader in MIPS/Watt
4G Bytes linear address space
Von Neumann load/store architecture:
– Single 32-bit data bus for instructions and data
3-stage pipeline architecture:
– Fetch, decode and execute stage
8-, 16-, and 32-bit data types
Single cycle 32x8 hardware multiplier:
– Multiplication is accelerated when upper bytes are all zero or one
On-chip JTAG Debug and In Circuit Emulation
Description
The ARM7TDMI embedded microcontroller core is a member of the Advanced
RISC Machines (ARM) family of general purpose 32-bit cores, which offer high perfor-
mance and very lower power consumption. Its outstanding feature is the 16-bit Thumb
subset of the most commonly used 32-bit instructions. These are expanded at run
time with no less of system performance. This gives 16-bit code density (saving mem-
ory area and cost) coupled with 32-bit processor performance.
The ARM architecture is based on Reduced Instruction Set Computer (RISC) princi-
ples, and the instruction set and related decode mechanism are much simpler than
those of microprogrammed Complex Instruction Set Computers. This simplicity results
in a high instruction throughput and impressive real-time interrupt response from a
small and cost-effective core.
Pipelining is employed so that all parts of the processing and memory systems can
operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM memory interface has been designed to allow the performance potential to
be realized without incurring high costs in the memory system. Speed-critical control
signals are pipelined to allow system control functions to be implemented in standard
low-power logic, and these control signals facilitate the exploitation of the fast local
access modes offered by industry standard dynamic RAMs.
The ARM memory interface is also ideally suited to interfacing, either on-chip or off-
chip, with Atmel’s Flash memory blocks. These give the benefits of in-system pro-
grammability and security, reducing time-to-market and system cost.
This datasheet presents the electrical characteristics of the ARM7TDMI Embedded
Core for the ATC50 process. See the ARM7TDMI Datasheet for the corresponding
timing diagrams.
The Atmel ATC50 (AT55K) process is a proprietary 0.5 micron three-layer-metal
CMOS process intended for use with a supply voltage of 3.3V
±
0.3V.
The following tables include low voltage performances (1.8V junction) to emulate 2.0V
applications. The user must take into account, however, whether or not the other cells
in the design can operate at these conditions.
ATC50 Electrical
Characteristics
ARM7TDMI
Embedded Core
Rev. 1248A–11/98
相关PDF资料 |
PDF描述 |
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| ARM940T | TECHNICAL REFERENCE MANUAL |
| ARS1298 | 10 TO 1200MHZ YO-8B CASCADABLE AMPLIFIER |
| AS1100PE | 8-digit, 5mA, serial int.; Package Type: PDIP-24; Temperature Range: -40 - +85 °C |
| AS1100PL | 8-digit, 5mA, serial int.; Package Type: PDIP-24; Temperature Range: 0 - +70 °C |
| AS1100WE-T | 8-digit, 5mA, serial int.; Package Type: SOIC-24; Temperature Range: -40 - +85 °C |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ARM7TDMI_G | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Technical Reference Manual |
| ARM7TDMI-S | 制造商:未知厂家 制造商全称:未知厂家 功能描述:周立功的中文ARM7TDI文档 |
| ARM920T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:System-on-Chip Platform OS Processor |
| ARM940T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:TECHNICAL REFERENCE MANUAL |
| ARM946E-S | 制造商:未知厂家 制造商全称:未知厂家 功能描述:ARM946E-S Microprocessor Core with Cache technical manual 6/01 |
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