参数资料
型号: ARM7TDMI
厂商: ATMEL CORP
元件分类: 微控制器/微处理器
英文描述: Embedded RISC Microcontroller Core(32位嵌入式RISC微控制器)
中文描述: 32-BIT, RISC MICROCONTROLLER, PBGA256
文件页数: 2/5页
文件大小: 27K
代理商: ARM7TDMI
ARM7TDMI Core
2
ATC50 AC Parameters
In the table below, SS1 emulates 3.0V worst case with voltage drop and noise immunity margins. SS2 emulates 2.0V worst
case with voltage drop and noise immunity margins.
Table 1.
Notes on AC Parameters
Note that “ns | ns/pf” in the array below means intrinsic delay(ns) or load dependant delay(ns/pf)
Table 2.
ATC50 AC Parameters
PVT
ff
typ
ss1
ss2
Process
fast
typ
slow
slow
Vjunction
3.6V
3.3V
2.85V
1.8V
Tjunction
-55
°
C
25
°
C
100
°
C
80
°
C
Symbol
Parameter
ff
typ
ss1
ss2
ns | ns/pf
ns | ns/pf
ns | ns/pf
ns | ns/pf
Tmckl
MCLK LOW time
6.42
10.22
18.90
37.81
Tmckh
MCLK HIGH time
6.42
10.22
18.90
37.81
Tws
nWAIT setup to MCLKr
0.44
0.75
1.47
2.84
Twh
nWAIT hold from MCKf
0.00
0.00
0.00
0.00
Tale
Address latch open
1.42 / 0.19
2.41 / 0.28
4.73 / 0.46
9.48 / 0.85
Taleh
Address latch hold time
1.11 / 0.14
1.89 / 0.20
3.77 / 0.34
7.29 / 0.50
Tald
Address latch time
1.33
2.15
4.12
7.20
Taddr
MCLKr to address valid
3.47 / 0.18
5.70 / 0.28
11.07 / 0.46
22.31 / 0.56
Tah
Address hold time from MCLKr
2.88 / 0.14
4.70 / 0.22
8.96 / 0.39
16.64 / 0.56
Tabe
Address bus enable time
1.34 / 0.19
2.19 / 0.28
4.19 / 0.46
7.87 / 0.85
Tabz
Address bus disable time
1.10
1.85
3.58
6.87
Taph
APE hold time from MCLKf
1.97
3.26
6.18
12.36
Taps
APE set up time to MCLKr
0.00
0.00
0.00
0.00
Tape
MCLKf to address valid
1.59 / 0.19
2.69 / 0.28
5.26 / 0.46
10.65 / 0.85
Tapeh
Address group hold time from MCLKf
1.28 / 0.14
2.18 / 0.20
4.25 / 0.34
8.53 / 0.49
Tdout
MCLKf to D[31:0] valid
3.68 / 0.17
6.19 / 0.24
12.19 / 0.38
23.74 / 0.70
Tdoh
D[31:0] out hold from MCLKf
2.90 / 0.19
4.87 / 0.28
9.34 / 0.46
17.62 / 0.86
Tdis
D[31:0] in setup time to MCLKf
0.00
0.00
0.00
0.00
Tdih
D[31:0] in hold time from MCLKf
0.81
1.35
2.56
4.54
Tdoutu
MCLKf to DOUT[31:0] valid
3.90 / 0.18
6.56 / 0.26
12.91 / 0.40
22.51 / 0.86
Tdohu
DOUT[31:0] hold time from MCLKf
2.42 / 0.14
4.03 / 0.20
7.84 / 0.34
14.26 / 0.50
Tdisu
DIN[31:0] set up time to MCLKf
0.19
0.25
0.54
0.98
Tdihu
DIN[hold time to MCLKf
0.49
0.77
1.39
2.79
Tnen
MCLKf to nENOUT valid
2.29 / 0.36
3.97 / 0.45
7.86 / 0.67
10.37 / 1.74
Tnenh
nENOUT hold time from MCLKf
1.61 / 0.29
2.77 / 0.41
5.30 / 0.67
9.80 / 0.99
Tbylh
BL[3:0] hold time from MCLKf
0.00
0.00
0.00
0.00
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