参数资料
型号: AS1334-BTDT
厂商: ams
文件页数: 12/19页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 0.65A 8TDFN
设计资源: Design Support Tool
标准包装: 1,000
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.2 V ~ 3.4 V
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 2MHz
电流 - 输出: 650mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-WDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 8-TDFN(3x3)
AS1334
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 23. Typical Operating System Circuit
V IN
PV IN
SW
3.3 μH
V OUT
2.7V to 5.5V
10 μF
VDD
AS1334
FB
10 μF
System Con-
troller
ON/OFF
EN
PGND
SGND
POK
8.1 Operating the AS1334
AS1334’s control block turns on the internal PFET (P-channel MOSFET) switch during the first part of each switching cycle, thus allowing current
to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of around
(V IN - V OUT ) / L, by storing energy in a magnetic field.
During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET (N-
channel MOSFET) synchronous rectifier on. As a result, the inductor ’s magnetic field collapses, generating a voltage that forces current from
ground through the synchronous rectifier to the output filter capacitor and load.
While the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope around V OUT / L. The
output filter capacitor stores charge when the inductor current is high, and releases it when low, smoothing the voltage across the load. The
output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to
sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at SW to a low-pass filter formed by the
inductor and output filter capacitor.
The output voltage is equal to the average voltage at the SW pin.
While in operation, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control
power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse width to control the peak inductor current. This is done
by comparing the signal from the current-sense amplifier with a slope compensated error signal from the voltage-feedback error amplifier. At the
beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past
the error amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending the first part of the
cycle.
If an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to ramp higher before the
comparator turns off the PFET. This increases the average current sent to the output and adjusts for the increase in the load. Before appearing
at the PWM comparator, a slope compensation ramp from the oscillator is subtracted from the error signal for stability of the current feedback
loop. The minimum on time of PFET in PWM mode is 50ns (typ).
Revision 1.09
11 - 18
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