参数资料
型号: AS3515-T
厂商: ams
文件页数: 24/67页
文件大小: 0K
描述: IC CODEC AFE AUDIO STER 64-CABGA
标准包装: 2,250
类型: 音频编解码器
应用: 便携式音频,电话
安装类型: 表面贴装
封装/外壳: 64-TFBGA
供应商设备封装: 64-CTBGA(7x7)
包装: 带卷 (TR)
AS3515 V15
austriamicrosystems
Data Sheet, Confidential
www.austriamicrosystems.com
Revision 3.1
29
- 66
6.10 Low Drop Out Regulators
6.10.1 General
These LDO’s are designed to supply sensitive analogue circuits, audio devices, AD and DA converters, micro-controller and other
peripheral devices.
The design is optimised to deliver the best compromise between quiescent current and regulator performance for battery powered
devices.
Stability is guaranteed with ceramic output capacitors of 1μF +/-20% (X5R) or 2.2μF +100/-50% (Z5U). The low ESR of these caps
ensures low output impedance at high frequencies. Regulation performance is excellent even under low dropout conditions, when the
power transistor has to operate in linear mode. Power supply rejection is high enough to suppress high ripple on the battery at the output.
The low noise performance allows direct connection of noise sensitive circuits without additional filtering networks. The low impedance of
the power device enables the device to deliver up to 150mA even at nearly discharged batteries without any decrease of performance.
Figure 11 LDO Block Diagram
Vref
1.8V
Low Noise
DC reference
High Gain
Low Bandwidth
Amplifier
Low Gain
Ultra High Bandwidth
Amplifier
PMOS
Power Device
1
Ω max.
VBAT
3V-5.5V
Vout
1.85-3.4V
150mA Load
1
μF
Z5U
external
GND
C_comp
(internal)
Vout
1.7 - 3.56V
200mA load
BVDD
3-5.5V
6.10.2 LDO1
This LDO generates the analog supply voltage used for the AS3515 itself.
Input voltage is BVDD
Output voltage is AVDD (typ. 2.9V)
6.10.3 LDO2
This LDO generates the digital supply voltage used for the AS3515 itself, microprocessor peripheral supply and external components like
SD-Cards, Nand-Flashes, FM-Radio…
Input Voltage is BVDD
Output Voltage is DVDD (typ. 2.9V)
Driver strength: 200mA
6.10.4 LDO3
This LDO will be used to supply the periphery voltage for a microprocessor.
Input Voltage BVDD
Output Voltage is PVDD 1.7 to 3.3V
Driver strength: 200mA
Programmable via P_PVDD pin and PVDDp bit in 8 steps
ams
AG
Technical
content
still
valid
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