参数资料
型号: AS5043 DB V2
厂商: ams
文件页数: 12/37页
文件大小: 0K
描述: BOARD DEMO AS5043
标准包装: 1
传感器类型: 磁性,旋转位置
传感范围: 360°
接口: USB
电源电压: 5V USB 或 9V
嵌入式: 是,MCU,8 位
已供物品: 板,线缆
已用 IC / 零件: AS5043
AS5043
Data Sheet – Analog Output
11.1.2 Diagnostic Output Mode
Figure 9: Diagnostic Output Mode
from 10% - 90% Vref . In an error case,
Vref
100%
90%
analog
output
voltage
In an error case, the output
voltage is in the grey area
normal
operating
area
In Diagnostic Output Mode (see Figure 9)
the analog output of the internal DAC ranges
*)
either when the supply is interrupted or
when the magnetic field is in the “red” range,
(see Table 3) the output is switched to 0V
and thus indicates the error condition.
10%
0%
90°
180°
270°
360°
angle
It is possible to enable the analog output
permanently (it will not be switched off even
if the magnetic field is out of range). To
enable this feature an OTP bit in the factory setting must be set. The corresponding bit is FS6. See application note
AS5040-20 (Extended features of OTP programming) for further details. The application note is available for download at
the austriamicrosystems website.
The analog and digital outputs will have the following conditions:
Status
DAC Output Voltage
SSI Digital Output
< 10% Vref ,
Normal operation
Magnetic field out of range
10% - 90% Vref
*)
*)
#0 - #1023 (0°-360°), MagRngn = 1
#0 - #1023 (0°-360°)
DAC output is switched to 0V
out of range is signaled in status bits:
MagInc=MagDec=LIN=1, MagRngn= 0
Broken positive power supply
(V OUT pull down resistor at receiving side)
Broken power supply ground
< 10% VDD **)
< 10% VDD **)
(V OUT pull down resistor at receiving side)
Broken positive power supply
(V OUT pull up resistor at receiving side)
Broken power supply ground
> 90% VDD **)
> 90% VDD **)
with pull down resistor at DO (receiving
side), all bits read by the SSI will be “0”-
s, indicating a non-valid output
(V OUT pull up resistor at receiving side)
*) Vref = internal: ? * VDD5V (pin #16) or external: V DACref (pin#9), depending on Ref_extEN bit in OTP (0=int., 1=ext.)
**) VDD = positive supply voltage at receiving side (3.0 – 5.5V)
www.austriamicrosystems.com
Revision 1.80
11 – 36
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