参数资料
型号: AS5163-HTST
厂商: ams
文件页数: 7/37页
文件大小: 0K
描述: IC ENCODER ROTARY 14-TSSOP
应用说明: AS5000 Series Magnet Selection Guide
AS5000 Series Magnets for Extended Vertical Range
标准包装: 4,500
传感范围: 30mT ~ 70mT
类型: 线性,旋转编码器 - 可编程
电源电压: 4.5 V ~ 5.5 V
电流 - 电源: 20mA
输出类型: 模拟,比率
特点: 可编程
工作温度: -40°C ~ 150°C
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 带卷 (TR)
AS5163
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6.3 Electrical System Specifications
T AMB = -40 to +150oC, VDD = 4.5 - 5.5V (5V operation), Magnetic Input Specification , unless otherwise noted.
Table 5. Electrical System Specifications
Symbol
RES
INL opt
INL temp
Parameter
Resolution Analog and PWM Output
Integral non-linearity (optimum)
360 degree full turn
Integral non-linearity (optimum)
360 degree full turn
Conditions
Angular operating range ≥ 90oC
Maximum error with respect to the best line
fit. Centered magnet without calibration,
T AMB =25oC
Maximum error with respect to the best line
fit. Centered magnet without calibration,
T AMB = -40 to +150oC
Min
Typ
Max
12
±0.5
±0.9
Units
bit
deg
deg
Best line fit = (Err max – Err min ) / 2
Over displacement tolerance with 6mm
INL
Integral non-linearity
360 degree full turn
diameter magnet, without calibration,
T AMB = -40 to +150oC.
Note: This parameter is a system
±1.4
deg
parameter and is dependant on the
selected magnet.
1 sigma;
TN
Transition noise
Note: The noise performance is
dependent on the programming of the
0.06
Deg
RMS
output characteristic.
VDD5 LowTH
VDD5 HighTH
t PwrUp
t delay
Undervoltage lower threshold
Undervoltage higher threshold
Power-up time
System propagation delay
absolute output: delay of ADC,
DSP and absolute interface
VDD5 = 5V
Fast mode, times 2 in slow mode
Fast mode, times 2 in slow mode
3.1
3.6
3.4
3.9
3.7
4.2
10
100
V
ms
μs
Note: The INL performance is specified over the full turn of 360 degrees. An operation in an angle segment increases the accuracy. A two
point linearization is recommended to achieve the best INL performance for the chosen angle segment.
6.4 Timing Characteristics
Table 6. Timing Conditions
Symbol
FRCOT
TCLK
Parameter
Internal Master Clock
Interface Clock Time
Conditions
TCLK = 1/ FRCOT
Min
4.05
202
Typ
4.5
222.2
Max
4.95
247
Units
MHz
ns
TDETWD
WatchDog error detection time
12
ms
www.austriamicrosystems.com/AS5163
Revision 2.7
6 - 36
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