参数资料
型号: AT32UC3A464-C1UR
厂商: Atmel
文件页数: 83/94页
文件大小: 0K
描述: IC MCU 64K FLASH 100VFBGA
产品培训模块: AVR® UC3 Introduction
标准包装: 1
系列: AVR®32 UC3 A4
核心处理器: AVR
芯体尺寸: 32-位
速度: 66MHz
连通性: EBI/EMI,I²C,IrDA,MMC,SPI,SSC,UART/USART,USB OTG
外围设备: 欠压检测/复位,DMA,POR,WDT
输入/输出数: 88
程序存储器容量: 64KB(64K x 8)
程序存储器类型: 闪存
RAM 容量: 128K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 1.95 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 100-VFBGA
包装: 标准包装
其它名称: AT32UC3A464-C1URDKR
84
32072SH–AVR32–10/2012
AT32UC3A3
10.2.16
FLASHC
Corrupted read in flash may happen after fuses write or erase operations (FLASHC
LP, UP, WGPB, EGPB, SSB, PGPFB, EAGPF commands)
After a flash fuse write or erase operation (FLASHC LP, UP, WGPB, EGPB, SSB, PGPFB,
EAGPF commands), reading (data read or code fetch) in flash may fail. This may lead to an
exception or to other errors derived from this corrupted read access.
Fix/Workaround
Before the flash fuse write or erase operation, enable the flash high speed mode (FLASHC
HSEN command). The flash fuse write or erase operations (FLASHC LP, UP, WGPB,
EGPB, SSB, PGPFB, EAGPF commands) must be issued from RAM or through the EBI.
After these commands, read 3 times one flash page initialized to 00h. Disable the flash high
speed mode (FLASHC HSDIS command). It is then possible to safely read or code fetch the
flash.
10.3
Rev. D
10.3.1
General
Devices cannot operate with CPU frequency higher than 66MHz in 1WS and 36MHz in
0WS
Fix/Workaround
None
DMACA
data
transfer
fails
when
CTLx.SRC_TR_WIDTH
is
not
equal
to
CTLx.DST_TR_WIDTH
Fix/Workaround
For any DMACA transfer make sure CTLx.SRC_TR_WIDTH = CTLx.DST_TR_WIDTH.
3.3V supply monitor is not available
FGPFRLO[30:29] are reserved and should not be used by the application.
Fix/Workaround
None.
Service access bus (SAB) can not access DMACA registers
Fix/Workaround
None.
10.3.2
Processor and Architecture
LDM instruction with PC in the register list and without ++ increments Rp
For LDM with PC in the register list: the instruction behaves as if the ++ field is always set, ie
the pointer is always updated. This happens even if the ++ field is cleared. Specifically, the
increment of the pointer is done in parallel with the testing of R12.
Fix/Workaround
None.
Hardware breakpoints may corrupt MAC results
Hardware breakpoints on MAC instructions may corrupt the destination register of the MAC
instruction.
Fix/Workaround
Place breakpoints on earlier or later instructions.
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