参数资料
型号: AT73C209-EK
厂商: Atmel
文件页数: 8/63页
文件大小: 0K
描述: BOARD EVAL FOR AT73C209
标准包装: 1
系列: PMAAC™
主要目的: 电源管理,专用型: 手机
已用 IC / 零件: AT73C209
已供物品: 板,CD,文档
8. SPI Interface
8.1
SPI architecture
The SPI is a 4 wire bi-directional asynchronous serial link. It works only in slave mode. The pro-
tocol is the following:
Figure 8-1.
SPI Protocol Diagram
SPI_CSB
SPI_CLK
rw a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0
SPI_DIN
d7 d6 d5 d4 d3 d2 d1 d0
SPI_DOUT
8.2
SPI Protocol
On SPI_DIN, the first bit is a read/write bit. 0 indicates a write operation while 1 is for a read
operation. The 7 following bits are used for the register address and the 8 last ones are the write
data. For both address and data, the most significant bit is the first one.
In case of a read operation, SPI_DOUT provides the contents of the read register, MSB first.
The transfer is enabled by the SPI_CSB signal, active low. When there is no operation on the
SPI interface, SPI_DOUT is set in high impedance to allow sharing of MCU serial interface with
other devices. The interface is reset at every rising edge of SPI_CSB in order to return to an idle
state, even if the transfer does not succeed. The SPI is synchronized with the serial clock
SPI_CLK. Falling edge latches SPI_DIN input and rising edge shifts SPI_DOUT output bits.
Note that MCLK (Audio Interface Master Clock Input) must run during any SPI write access reg-
isters (from address 0x00 to 0x0C).
8
AT73C209
6365A–PMAAC–12-Mar-08
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