参数资料
型号: AT80C51RD2-SLSUM
厂商: Atmel
文件页数: 18/81页
文件大小: 0K
描述: IC 8051 MCU 5V SPI 20MHZ 44-PLCC
标准包装: 972
系列: 80C
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器类型: ROMless
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-PLCC
包装: 管件
25
4113D–8051–01/09
AT80C51RD2
Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and
are set by hardware when either a match or a capture occurs. These flags can only be
cleared by software.
Table 10-2.
CCON Register
CCON - PCA Counter Control Register (D8h)
Reset Value = 000X 0000b
Not bit addressable
The watchdog timer function is implemented in module 4 (see Figure 10-4).
The PCA interrupt system is shown in Figure 10-2.
765
4321
0
CF
CR
-
CCF4
CCF3
CCF2
CCF1
CCF0
Bit
Number
Bit
Mnemonic
Description
7CF
PCA Counter Overflow flag
Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in CMOD is
set. CF may be set by either hardware or software but can only be cleared by software.
6CR
PCA Counter Run control bit
Must be cleared by software to turn the PCA counter off.
Set by software to turn the PCA counter on.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4CCF4
PCA Module 4 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
3CCF3
PCA Module 3 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
2CCF2
PCA Module 2 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
1CCF1
PCA Module 1 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
0CCF0
PCA Module 0 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
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