参数资料
型号: AT89C51CC02UA-SISUM
厂商: Atmel
文件页数: 4/159页
文件大小: 0K
描述: IC 8051 MCU 16K FLASH 28-PLCC
产品培训模块: MCU Product Line Introduction
标准包装: 888
系列: AT89C CAN
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: CAN,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 20
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
EEPROM 大小: 2K x 8
RAM 容量: 512 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 28-PLCC
包装: 管件
产品目录页面: 616 (CN2011-ZH PDF)
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
101
AT/T89C51CC02
4126L–CAN–01/08
Table 66. CANBT2 Register
CANBT2 (S:B5h) – CAN bit Timing Registers 2
Note:
1. The CAN controller bit timing registers must be accessed only if the CAN controller is
disabled with the ENA bit of the CANGCON register set to 0.
No default value after reset.
765
43210
-
SJW 1
SJW 0
-
PRS 2
PRS 1
PRS 0
-
Bit Number
Bit Mnemonic
Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6 - 5
SJW1:0
Re-synchronization Jump Width
To compensate for phase shifts between clock oscillators of
different bus controllers, the controller must re-synchronize on any
relevant signal edge of the current transmission.
The synchronization jump width defines the maximum number of
clock cycles. A bit period may be shortened or lengthened by a re-
synchronization.
4-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3 - 1
PRS2:0
Programming Time Segment
This part of the bit time is used to compensate for the physical
delay times within the network. It is twice the sum of the signal
propagation time on the bus line, the input comparator delay and
the output driver delay.
0-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Tsjw = Tscl x (SJW [1..0] +1)
Tprs = Tscl x (PRS[2..0] + 1)
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