参数资料
型号: AT89C51CC02UA-SISUM
厂商: Atmel
文件页数: 73/159页
文件大小: 0K
描述: IC 8051 MCU 16K FLASH 28-PLCC
产品培训模块: MCU Product Line Introduction
标准包装: 888
系列: AT89C CAN
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: CAN,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 20
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
EEPROM 大小: 2K x 8
RAM 容量: 512 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 28-PLCC
包装: 管件
产品目录页面: 616 (CN2011-ZH PDF)
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
20
AT/T89C51CC02
4126L–CAN–01/08
Power Management
Two power reduction modes are implemented in the A/T89C51CC02: the Idle mode and
the Power-down mode. These modes are detailed in the following sections. In addition
to these power reduction modes, the clocks of the core and peripherals can be dynami-
cally divided by 2 using the X2 Mode detailed in Section “Clock”.
Reset Pin
In order to start-up (cold reset) or to restart (warm reset) properly the microcontroller, a
high level has to be applied on the RST pin. A bad level leads to a wrong initialisation of
the internal registers like SFRs, PC, etc. and to unpredictable behavior of the microcon-
troller. A warm reset can be applied either directly on the RST pin or indirectly by an
internal reset source such as a watchdog, PCA, timer, etc.
At Power-up (cold reset)
Two conditions are required before enabling a CPU start-up:
VDD must reach the specified VDD range,
The level on xtal1 input must be outside the specification (VIH, VIL).
If one of these two conditions are not met, the microcontroller does not start correctly
and can execute an instruction fetch from anywhere in the program space. An active
level applied on the RST pin must be maintained until both of the above conditions are
met. A reset is active when the level VIH1 is reached and when the pulse width covers
the period of time where VDD and the oscillator are not stabilized. Two parameters have
to be taken into account to determine the reset pulse width:
VDD rise time (vddrst),
Oscillator startup time (oscrst).
To determine the capacitor the highest value of these two parameters has to be chosen.
The reset circuitry is shown in Figure 5.
Figure 5. Reset Circuitry
Table 13 and Table 14 give some typical examples for three values of VDD rise times,
two values of oscillator start-up time and two pull-down resistor values.
Table 13. Minimum Reset Capacitor for a 50K Pull-down Resistor
oscrst/vddrst
1ms
10ms
100ms
5ms
820nF
1.2F
12F
20ms
2.7F
3.9F
12F
0
VDD
Rrst
Crst
RST pin
Internal reset
Reset input circuitry
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