参数资料
型号: AT89EB5114-TGSIL
厂商: ATMEL CORP
元件分类: 微控制器/微处理器
英文描述: Low-pin-count 8-bit microcontroller with A/D converter
中文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDSO20
封装: SO-20
文件页数: 54/95页
文件大小: 1126K
代理商: AT89EB5114-TGSIL
54
4311A–8051–01/05
WatchDog Timer
AT8xEB5114 contains a powerful programmable hardware WatchDog Timer (WDT) that
automatically resets the chip if its software fails to reset the WDT before the selected
time interval has elapsed. It permits large Time-Out ranking from 16 ms to 2s @Fosc =
12 MHz.
This WDT consists of a 14-bit counter plus a 7-bit programmable counter, a WatchDog
Timer reset register (WDTRST) and a WatchDog Timer programmation (WDTPRG) reg-
ister. When exiting reset, the WDT is -by default- disabled. To enable the WDT, the user
has to write the sequence 1EH and E1H into WDRST register. When the WatchDog
Timer is enabled, it will increment every machine cycle while the oscillator is running
and there is no way to disable the WDT except through reset (either hardware reset or
WDT overflow reset). When WDT overflows, it will generate an output RESET pulse at
the RST pin. The RESET pulse duration is 96xT
OSC
, where T
OSC
=1/F
OSC
. To make the
best use of the WDT, it should be serviced in those sections of code that will periodically
be executed within the time required to prevent a WDT reset.
The WDT is controlled by two registers (WDTRST and WDTPRG)
Figure 24.
WatchDog Timer
RESET
Decoder
Control
WDTRST
WR
Enable
14-bit COUNTER
7-bit COUNTER
Outputs
F
CPU_PERIPH
RESET
-
-
-
-
-
2
1
0
WDTPRG
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