参数资料
| 型号： | AT89LP4052-16SI |
| 厂商： | Atmel |
| 文件页数： | 30/94页 |
| 文件大小： | 0K |
| 描述： | IC 8051 MCU FLASH 4K 20SOIC |
| 标准包装： | 38 |
| 系列： | 89LP |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 16MHz |
| 连通性： | SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 15 |
| 程序存储器容量： | 4KB（4K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 256 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.4 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 包装： | 管件 |
| 其它名称： | AT89LP4052-20SI AT89LP4052-20SI-ND |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页当前第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页
36
3547J–MICRO–10/09
AT89LP2052/LP4052
18.4
More About Mode 1
Ten bits are transmitted (through TXD), or received (through RXD): a start bit (0), 8 data bits
(LSB first), and a stop bit (1). On receive, the stop bit goes into RB8 in SCON. In the
AT89LP2052/LP4052, the baud rate is determined by the Timer 1 overflow rate. The baud rate
is determined by the Timer 1 overflow rate. Figure 18-2 shows a simplified functional diagram of
the serial port in Mode 1 and associated timings for transmit and receive.
Transmission is initiated by any instruction that uses SBUF as a destination register. The “write
to SBUF” signal also loads a “1” into the ninth bit position of the transmit shift register and flags
the TX Control unit that a transmission is requested. Transmission actually commences at S1P1
of the machine cycle following the next rollover in the divide-by-16 counter. Thus, the bit times
are synchronized to the divide-by-16 counter, not to the “write to SBUF” signal.
The transmission begins when SEND is activated, which puts the start bit at TXD. One bit time
later, DATA is activated, which enables the output bit of the transmit shift register to TXD. The
first shift pulse occurs one bit time after that.
As data bits shift out to the right, “0”s are clocked in from the left. When the MSB of the data byte
is at the output position of the shift register, the “1” that was initially loaded into the ninth position
is just to the left of the MSB, and all positions to the left of that contain “0”s. This condition flags
the TX Control unit to do one last shift, then deactivate SEND and set TI. This occurs at the tenth
divide-by-16 rollover after “write to SBUF.”
Reception is initiated by a 1-to-0 transition detected at RXD. For this purpose, RXD is sampled
at a rate of 16 times the established baud rate. When a transition is detected, the divide-by-16
counter is immediately reset, and 1FFH is written into the input shift register. Resetting the
divide-by-16 counter aligns its roll-overs with the boundaries of the incoming bit times.
The 16 states of the counter divide each bit time into 16ths. At the seventh, eighth, and ninth
counter states of each bit time, the bit detector samples the value of RXD. The value accepted is
the value that was seen in at least 2 of the 3 samples. This is done to reject noise. In order to
reject false bits, if the value accepted during the first bit time is not 0, the receive circuits are
reset and the unit continues looking for another 1-to-0 transition. If the start bit is valid, it is
shifted into the input shift register, and reception of the rest of the frame proceeds.
As data bits come in from the right, “1”s shift out to the left. When the start bit arrives at the left
most position in the shift register, (which is a 9-bit register in Mode 1), it flags the RX Control
block to do one last shift, load SBUF and RB8, and set RI. The signal to load SBUF and RB8
and to set RI is generated if, and only if, the following conditions are met at the time the final shift
pulse is generated.
RI = 0 and
Either SM2 = 0, or the received stop bit = 1
If either of these two conditions is not met, the received frame is irretrievably lost. If both condi-
tions are met, the stop bit goes into RB8, the 8 data bits go into SBUF, and RI is activated. At
this time, whether or not the above conditions are met, the unit continues looking for a 1-to-0
transition in RXD.
相关PDF资料 |
PDF描述 |
|---|---|
| AT89LP4052-16PU | IC 8051 MCU FLASH 4K 20DIP |
| PIC18LF4420-I/ML | IC MCU FLASH 8KX16 44QFN |
| PIC18F2331-I/MM | IC PIC MCU FLASH 4KX16 28QFN |
| AT89LP4052-16PI | IC 8051 MCU FLASH 4K 20DIP |
| DSPIC30F3011-30I/P | IC DSPIC MCU/DSP 24K 40DIP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AT89LP4052-16SU | 功能描述:IC 8051 MCU FLASH 4K 20SOIC RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:89LP 标准包装:1,500 系列:AVR® ATtiny 核心处理器:AVR 芯体尺寸:8-位 速度:16MHz 连通性:I²C，LIN，SPI，UART/USART，USI 外围设备:欠压检测/复位，POR，PWM，温度传感器，WDT 输入/输出数:16 程序存储器容量:8KB（4K x 16） 程序存储器类型:闪存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 5.5 V 数据转换器:A/D 11x10b 振荡器型:内部 工作温度:-40°C ~ 125°C 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 包装:带卷 (TR) |
| AT89LP4052-16XI | 功能描述:8位微控制器 -MCU Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| AT89LP4052-16XU | 功能描述:8位微控制器 -MCU Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| AT89LP4052-20PU | 功能描述:8位微控制器 -MCU SINGLE CYCLE 4K FLASH-20MHZ 2.4-5.5V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| AT89LP4052-20SU | 功能描述:8位微控制器 -MCU SINGLE CYCLE 4K FLASH-20MHZ 2.4-5.5V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
发布紧急采购，3分钟左右您将得到回复。