参数资料
| 型号： | AT89S51-24JU |
| 厂商： | Atmel |
| 文件页数： | 31/31页 |
| 文件大小： | 0K |
| 描述： | IC MCU 4K FLASH 24MHZ 44-PLCC |
| 产品培训模块： | MCU Product Line Introduction |
| 标准包装： | 27 |
| 系列： | 89S |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 24MHz |
| 连通性： | UART/USART |
| 外围设备： | WDT |
| 输入/输出数： | 32 |
| 程序存储器容量： | 4KB（4K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 128 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LCC（J 形引线） |
| 包装： | 管件 |
| 产品目录页面： | 616 (CN2011-ZH PDF) |
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9
2487D–MICRO–6/08
AT89S51
6.
Memory Organization
MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K
bytes each of external Program and Data Memory can be addressed.
6.1
Program Memory
If the EA pin is connected to GND, all program fetches are directed to external memory.
On the AT89S51, if EA is connected to V
CC, program fetches to addresses 0000H through FFFH
are directed to internal memory and fetches to addresses 1000H through FFFFH are directed to
external memory.
6.2
Data Memory
The AT89S51 implements 128 bytes of on-chip RAM. The 128 bytes are accessible via direct
and indirect addressing modes. Stack operations are examples of indirect addressing, so the
128 bytes of data RAM are available as stack space.
7.
Watchdog Timer (One-time Enabled with Reset-out)
The WDT is intended as a recovery method in situations where the CPU may be subjected to
software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset
(WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user
must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When
the WDT is enabled, it will increment every machine cycle while the oscillator is running. The
WDT timeout period is dependent on the external clock frequency. There is no way to disable
the WDT except through reset (either hardware reset or WDT overflow reset). When WDT over-
flows, it will drive an output RESET HIGH pulse at the RST pin.
7.1
Using the WDT
To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register
(SFR location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EH
and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows when it reaches
16383 (3FFFH), and this will reset the device. When the WDT is enabled, it will increment every
machine cycle while the oscillator is running. This means the user must reset the WDT at least
Table 5-3.
AUXR1: Auxiliary Register 1
AUXR1
Address = A2H
Reset Value = XXXXXXX0B
Not Bit Addressable
–––
–
DPS
Bit
765
4
3
2
1
0
–
Reserved for future expansion
DPS
Data Pointer Register Select
DPS
0
Selects DPTR Registers DP0L, DP0H
1
Selects DPTR Registers DP1L, DP1H
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AT89S51-24JU SL383 | 制造商:Atmel Corporation 功能描述:MCU 8-bit AT89 80C51 CISC 4KB Flash 5V 44-Pin PLCC T/R |
| AT89S51-24PC | 功能描述:8位微控制器 -MCU 4K ISP FLASH 2.7 TO 5.5V - 24 MHZ RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| AT89S51-24PI | 功能描述:8位微控制器 -MCU 4K ISP FLASH 2.7 TO 5.5V - 24 MHZ RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| AT89S51-24PU | 功能描述:8位微控制器 -MCU 4kB Flash 128B RAM 33MHz 4.0V-5.5V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| AT89S51-24PU SL383 | 制造商:Atmel Corporation 功能描述:8051 4K ISP FLASH 4.0 TO 5.5V |
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