参数资料
型号: AT91FR40162SB-CU-999
厂商: Atmel
文件页数: 2/22页
文件大小: 0K
描述: IC MCU 32BIT RISC 121BGA
标准包装: 1,000
系列: AT91
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 75MHz
连通性: EBI/EMI,UART/USART
外围设备: WDT
输入/输出数: 32
程序存储器容量: 2MB(1M x 16)
程序存储器类型: 闪存
RAM 容量: 256K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 1.95 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 121-BGA
包装: 带卷 (TR)
10
6410BS–ATARM–12-Jan-10
AT91FR40162SB
7.
Product Overview
7.1
Power Supply
The AT91FR40162SB device has two types of power supply pins:
VDDCORE pins that power the chip core (i.e., the AT91R40008 with its embedded SRAM
and peripherals)
VDDIO pins that power the AT91R40008 I/O lines and the Flash memory
An independent I/O supply allows a flexible adaptation to external component signal levels.
7.2
Input/Output Considerations
The AT91FR40162SB I/O pads accept voltage levels up to the VDDIO power supply limit. After
the reset, the microcontroller peripheral I/Os are initialized as inputs to provide the user with
maximum flexibility. It is recommended that in any application phase, the inputs to the microcon-
troller be held at valid logic levels to minimize the power consumption.
7.3
Master Clock
The AT91FR40162SB has a fully static design and works on the Master Clock (MCK), provided
on the MCKI pin from an external source.
The Master Clock is also provided as an output of the device on the pin MCKO, which is multi-
plexed with a general purpose I/O line. While NRST is active, and after the reset, the MCKO is
valid and outputs an image of the MCK signal. The PIO Controller must be programmed to use
this pin as standard I/O line.
7.4
Reset
Reset restores the default states of the user interface registers (defined in the user interface of
each peripheral), and forces the ARM7TDMI to perform the next instruction fetch from address
zero. Except for the program counter the ARM7TDMI registers do not have defined reset states.
7.4.1
NRST Pin
NRST is an active low-level input. It is asserted asynchronously, but exit from reset is synchro-
nized internally to the MCK. The signal presented on MCKI must be active within the
specification for a minimum of 10 clock cycles up to the rising edge of NRST to ensure correct
operation. The first processor fetch occurs 80 clock cycles after the rising edge of NRST.
7.4.2
Watchdog Reset
The watchdog can be programmed to generate an internal reset. In this case, the reset has the
same effect as the NRST pin assertion, but the pins BMS and NTRI are not sampled. Boot Mode
and Tri-state Mode are not updated. If the NRST pin is asserted and the watchdog triggers the
internal reset, the NRST pin has priority.
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相关代理商/技术参数
参数描述
AT91FR40162SBPRE 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:Flash memory in a single compact 121-ball BGA package
AT91FR40162S-CJ 功能描述:ARM微控制器 - MCU 256K SRAM 2M FLASH IND TEMP RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 处理器系列:STM32F373xx 数据总线宽度:32 bit 最大时钟频率:72 MHz 程序存储器大小:256 KB 数据 RAM 大小:32 KB 片上 ADC:Yes 工作电源电压:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LQFP-48 安装风格:SMD/SMT
AT91FR40162S-CJ SL383 制造商:Atmel Corporation 功能描述:MCU 32-bit 91F ARM7TDMI RISC 2048KB Flash 1.8V 121-Pin BGA T/R
AT91FR4042 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:AT91 ARM Thumb Microcontrollers
AT91FR4042_02 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:AT91 ARM Thumb Microcontrollers