参数资料
| 型号： | ATA6838C-PXQW |
| 厂商： | Atmel |
| 文件页数： | 11/18页 |
| 文件大小： | 0K |
| 描述： | IC DVR HEX HALF BRIDGE 24QFN |
| 标准包装： | 6,000 |
| 类型： | 半桥，高端/低端 |
| 输入类型： | 串行 |
| 输出数： | 6 |
| 导通状态电阻： | 1 欧姆 |
| 电流 - 输出 / 通道： | 950mA |
| 电流 - 峰值输出： | 1.25A |
| 电源电压： | 7 V ~ 40 V |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VQFN 裸露焊盘 |
| 供应商设备封装： | 24-QFN 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
| 其它名称： | ATA6838C-PXQW-ND |
7.
Electrical Characteristics (Continued)
7.5V < V S < 40V; 4.75 < V CC < 5.25V; INH = High; –40°C < T j < 150°C; unless otherwise specified, all values refer to GND pins.
No. Parameters
Test Conditions
Pin QFN24
Symbol
Min.
Typ.
Max.
Unit
Type*
5.7
5.8
5.9
5.10
5.11
5.12
5.13
Overcurrent limitation
and shutdown threshold
Overcurrent limitation
and shutdown threshold
Overcurrent limitation
and shutdown threshold
Overcurrent shutdown
delay time
Overcurrent shutdown
delay time
High-side open load
detection current
Low-side open load
detection current
V VS = 13V
20V < V VS < 40V
20V < V VS < 40V
Input register
bit 14 (SCT) = low
V VS = 13V
Input register
bit 14 (SCT) = High
V VS = 13V
Input register bit 13
(OLD) = low, output off
Input register bit 13
(OLD) = low, output off
2, 5, 8, 11,
20, 23
2, 5, 8, 11,
20, 23
2, 5, 8, 11,
20, 23
2, 5, 8, 11,
20, 23
2, 5, 8, 11,
20, 23
I HS1-6
I LS1-6
I HS1-6
t dSd
t dSd
I Out1-6H
I Out1-6L
–1710
950
–2100
0.45
4.8
–1.5
0.45
–1250
1.3
9
–950
2100
–950
2.1
15
–0.4
1.75
mA
mA
mA
ms
ms
mA
mA
A
C
C
A
A
A
A
5.14
Open load detection
current ratio
2, 5, 8, 11,
20, 23
I OLoutLX/
I OLoutHX
1.05
1.2
2
5.15
5.16
High-side open load
detection voltage
Low-side open load
detection voltage
Input register bit 13
(OLD) = low, output off
Input register bit 13
(OLD) = low, output off
2, 5, 8, 11,
20, 23
2, 5, 8, 11,
20, 23
V Out1-6H
V Out1-6L
0.6
0.7
2.5
2.1
V
V
A
A
5.17
5.18
5.19
5.20
High-side output switch V VS = 13V
on delay (1) R Load = 30 Ω
Low-side output switch V VS = 13V
on delay (1) R Load = 30 Ω
High-side output switch V VS =13V
off delay (1) R Load = 30 Ω
Low-side output switch V VS =13V
off delay (1) R Load = 30 Ω
t don
t don
t doff
t doff
20
20
20
3
μs
μs
μs
μs
A
A
A
A
Dead time between
5.21 corresponding high- and
low-side switches
V VS =13V
R Load = 30 Ω
t don – t doff
0.7
μs
A
6
Inhibit Input
6.1
6.2
Input voltage low-level
threshold
Input voltage high-level
threshold
12
12
V IL
V IH
0.3 ×
V VCC
0.7 ×
V VCC
V
V
A
A
6.3
Hysteresis of input
voltage
12
Δ V I
100
700
mV
A
6.4 Pull-down current
V INH = V VCC
I PD
10
80
μA
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
1. Delay time between rising edge of input signal at pin CS after data transmission and switch on/off output stages to 90% of
final level. Device not in standby for t > 1ms.
Atmel ATA6838C [DATASHEET]
9237F–AUTO–05/12
11
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