参数资料
型号: ATF16V8B-10JC
厂商: Atmel
文件页数: 2/26页
文件大小: 0K
描述: IC PLD 8CELL 10NS 20PLCC
标准包装: 48
系列: 16V8
可编程类型: EE PLD
宏单元数: 8
输入电压: 5V
速度: 10ns
安装类型: 表面贴装
封装/外壳: 20-LCC(J 形引线)
供应商设备封装: 20-PLCC
包装: 管件
10
0364J–PLD–7/05
ATF16V8B/BQ/BQL
11.1
ATF16V8B Registered Mode
PAL Device Emulation/PAL Replacement. The registered mode is used if one or more regis-
ters are required. Each macrocell can be configured as either a registered or combinatorial
output or I/O, or as an input. For a registered output or I/O, the output is enabled by the OE pin,
and the register is clocked by the CLK pin. Eight product terms are allocated to the sum term.
For a combinatorial output or I/O, the output enable is controlled by a product term, and seven
product terms are allocated to the sum term. When the macrocell is configured as an input, the
output enable is permanently disabled.
Any register usage will make the compiler select this mode. The following registered devices
can be emulated using this mode:
16R8
16RP8
16R6
16RP6
16R4
16RP4
Figure 11-1. Registered Configuration for Registered Mode
Notes:
1. Pin 1 controls common CLK for the registered outputs. Pin 11 controls common OE for the reg-
istered outputs. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin
usage automatically.
Figure 11-2. Combinatorial Configuration for Registered Mode
Notes:
1. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin
usage automatically.
相关PDF资料
PDF描述
ATF16LV8C-10SC IC PLD EE 15NS 20-SOIC
1-84952-4 CONN FPC 14POS 1.00MM R/A SMD
AMC65DREF-S734 CONN EDGECARD 130PS .100 EYELET
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