参数资料
型号: ATF16V8C-7XU
厂商: Atmel
文件页数: 22/23页
文件大小: 0K
描述: IC PLD 7NS 20TSSOP
标准包装: 74
系列: 16V8
可编程类型: EE PLD
宏单元数: 8
输入电压: 5V
速度: 7ns
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 管件
8
0425H–PLD–3/11
Atmel ATF16V8C
15.
Functional logic diagram description
The logic option and functional diagrams describe the ATF16V8C architecture. Eight configurable macrocells can be
configured as a registered output, combinatorial I/O, combinatorial output, or dedicated input.
The ATF16V8C can be configured in one of three different modes. Each mode makes the ATF16V8C look like a different
device. Most PLD compilers can choose the right mode automatically. The user can also force the selection by supplying
the compiler with a mode selection. The determining factors would be the usage of register versus combinatorial outputs
and dedicated outputs versus outputs with output enable control.
The ATF16V8C universal architecture can be programmed to emulate many 20-pin PAL devices. These architectural
subsets can be found in each of the configuration modes described in the following pages. The user can download the
listed subset device JEDEC programming file to the PLD programmer, and the ATF16V8C can be configured to act like the
chosen device. Check with your programmer manufacturer for this capability.
Unused product terms are automatically disabled by the compiler to decrease power consumption. A security fuse, when
programmed, protects the content of the ATF16V8C. Eight bytes (64 fuses) of user signature are accessible to the user
for purposes such as storing project name, part number, revision, or date. The user signature is accessible regardless of the
state of the security fuse.
Table 15-1.
Compiler mode selection
Note:
1. Please call Atmel PLD Hotline at (408) 436-4333 for more information
2. Only applicable for version 3.4 or lower
16.
Macrocell configuration
Software compilers support the three different OMC modes as different device types. These device types are listed in the
table below. Most compilers have the ability to automatically select the device type, generally based on the register usage
and output enable (OE) usage. Register usage on the device forces the software to choose the registered mode. All
combinatorial outputs with OE controlled by the product term will force the software to choose the complex mode. The
software will choose the simple mode only when all outputs are dedicated combinatorial without OE control. The different
device types listed in the table can be used to override the automatic device selection by the software. For further details,
refer to the compiler software manuals.
When using compiler software to configure the device, the user must pay special attention to the following restrictions in
each mode.
In registered mode, pin 1 and pin 11 are permanently configured as clock and output enable, respectively. These pins
cannot be configured as dedicated inputs in the registered mode.
In complex mode, pin 1 and pin 11 become dedicated inputs and use the feedback paths of pin 19 and pin 12
respectively. Because of this feedback path usage, pin 19 and pin 12 do not have the feedback option in this mode.
Registered
Complex
Simple
Auto select
ABEL, Atmel-ABEL
P16V8R
P16V8C
P16V8AS
P16V8
With PD ENABLE
P16V8PDR
P16V8PDC
P16V8PD
P16V8PDS
CUPL, Atmel-CUPL
G16V8MS
G16V8MA
G16V8AS
G16V8A
With PD ENABLE
G16V8CPMS
G16V8CPMA
G16V8CPAS
G16V8CP
LOG/iC
GAL16V8_R
GAL16V8_C7
GAL16V8_C8
GAL16V8
OrCAD-PLD
“Registered”
“Complex”
“Simple”
GAL16V8A
PLDesigner
P16V8R
P16V8C
P16V8A
Synario/Atmel-Synario
NA
ATF16V8C ALL
With PD ENABLE
NA
ATF16V8C (PD) ALL
Tango-PLD
G16V8R
G16V8C
G16V8AS
G16V8
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