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参数资料
型号： ATMEGA1284-PU
厂商： Atmel
文件页数： 28/160页
文件大小： 0K
描述： IC MCU AVR 128K FLASH 40PDIP
产品培训模块： MCU Product Line Introduction
megaAVR Introduction
标准包装： 10
系列： AVR® ATmega
核心处理器： AVR
芯体尺寸： 8-位
速度： 20MHz
连通性： I²C，SPI，UART/USART
外围设备： 欠压检测/复位，POR，PWM，WDT
输入/输出数： 32
程序存储器容量： 128KB（64K x 16）
程序存储器类型： 闪存
EEPROM 大小： 4K x 8
RAM 容量： 16K x 8
电压 - 电源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
数据转换器： A/D 8x10b
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 40-DIP（0.600"，15.24mm）
包装： 管件
配用： ATSTK600-RC05-ND - STK600 ROUTING CARD AVR
123
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
16.9
Compare Match Output unit
The Compare Output mode (COMnx1:0) bits have two functions. The Waveform Generator uses
the COMnx1:0 bits for defining the Output Compare (OCnx) state at the next compare match.
Secondly the COMnx1:0 bits control the OCnx pin output source. Figure 16-5 shows a simplified
schematic of the logic affected by the COMnx1:0 bit setting. The I/O Registers, I/O bits, and I/O
pins in the figure are shown in bold. Only the parts of the general I/O Port Control Registers
(DDR and PORT) that are affected by the COMnx1:0 bits are shown. When referring to the
OCnx state, the reference is for the internal OCnx Register, not the OCnx pin. If a system reset
occur, the OCnx Register is reset to “0”.
Figure 16-5. Compare Match Output unit, schematic.
The general I/O port function is overridden by the Output Compare (OCnx) from the Waveform
Generator if either of the COMnx1:0 bits are set. However, the OCnx pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OCnx pin (DDR_OCnx) must be set as output before the OCnx value is visi-
ble on the pin. The port override function is generally independent of the Waveform Generation
mode, but there are some exceptions. Refer to Table 16-2, Table 16-3 and Table 16-4 for
details.
The design of the Output Compare pin logic allows initialization of the OCnx state before the out-
put is enabled. Note that some COMnx1:0 bit settings are reserved for certain modes of
operation. See “Register description” on page 133.
The COMnx1:0 bits have no effect on the Input Capture unit.
PORT
DDR
DQ
OCnx
Pin
OCnx
DQ
Waveform
Generator
COMnx1
COMnx0
0
1
D
ATA
B
U
S
FOCnx
clk
I/O
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