参数资料
型号: ATMEGA328P-15AZ
厂商: Atmel
文件页数: 34/83页
文件大小: 0K
描述: MCU AVR 32K FLASH 15MHZ 32-TQFP
产品培训模块: megaAVR Introduction
标准包装: 1
系列: AVR® ATmega
核心处理器: AVR
芯体尺寸: 8-位
速度: 16MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 23
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 32-TQFP
包装: 剪切带 (CT)
其它名称: ATMEGA328P-15AZCT
2010-2012 Microchip Technology Inc.
DS41413C-page 199
PIC12(L)F1822/PIC16(L)F1823
23.5
Carrier Source Polarity Select
The signal provided from any selected input source for
the carrier high and carrier low signals can be inverted.
Inverting the signal for the carrier high source is
enabled by setting the MDCHPOL bit of the MDCARH
register. Inverting the signal for the carrier low source is
enabled by setting the MDCLPOL bit of the MDCARL
register.
23.6
Carrier Source Pin Disable
Some peripherals assert control over their correspond-
ing output pin when they are enabled. For example,
when the CCP1 module is enabled, the output of CCP1
is connected to the CCP1 pin.
This default connection to a pin can be disabled by set-
ting the MDCHODIS bit in the MDCARH register for the
carrier high source and the MDCLODIS bit in the
MDCARL register for the carrier low source.
23.7
Programmable Modulator Data
The MDBIT of the MDCON register can be selected as
the source for the modulator signal. This gives the user
the ability to program the value used for modulation.
23.8
Modulator Source Pin Disable
The modulator source default connection to a pin can
be disabled by setting the MDMSODIS bit in the
MDSRC register.
23.9
Modulated Output Polarity
The modulated output signal provided on the MDOUT
pin can also be inverted. Inverting the modulated out-
put signal is enabled by setting the MDOPOL bit of the
MDCON register.
23.10 Slew Rate Control
The slew rate limitation on the output port pin can be
disabled. The slew rate limitation can be removed by
clearing the MDSLR bit in the MDCON register.
23.11 Operation in Sleep Mode
The DSM module is not affected by Sleep mode. The
DSM can still operate during Sleep, if the Carrier and
Modulator input sources are also still operable during
Sleep.
23.12 Effects of a Reset
Upon any device Reset, the Data Signal Modulator
module is disabled. The user’s firmware is responsible
for initializing the module before enabling the output.
The registers are reset to their default values.
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