参数资料
型号: ATTINY4313-SU
厂商: Atmel
文件页数: 13/22页
文件大小: 0K
描述: IC MCU AVR 4K FLASH 20SOIC
产品培训模块: MCU Product Line Introduction
tinyAVR Introduction
标准包装: 37
系列: AVR® ATtiny
核心处理器: AVR
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 18
程序存储器容量: 4KB(2K x 16)
程序存储器类型: 闪存
EEPROM 大小: 256 x 8
RAM 容量: 256 x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
包装: 管件
PIC16F872
DS30221C-page 18
2006 Microchip Technology Inc.
2.2.2.7
PIR2 Register
The PIR2 register contains the flag bits for the CCP2
interrupt, the SSP bus collision interrupt and the
EEPROM write operation interrupt.
.
REGISTER 2-7:
PIR2 REGISTER (ADDRESS: 0Dh)
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
U-0
R/W-0
U-0
R/W-0
U-0
R/W-0
reserved
EEIF
BCLIF
reserved
bit 7
bit 0
bit 7
Unimplemented: Read as '0'
bit 6
Reserved: Always maintain this bit clear
bit 5
Unimplemented: Read as '0'
bit 4
EEIF: EEPROM Write Operation Interrupt Flag bit
1
= The write operation completed (must be cleared in software)
0
= The write operation is not complete or has not been started
bit 3
BCLIF: Bus Collision Interrupt Flag bit
1
= A bus collision has occurred in the SSP, when configured for I2C Master mode
0
= No bus collision has occurred
bit 2-1
Unimplemented: Read as '0'
bit 0
Reserved: Always maintain this bit clear
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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