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参数资料
| 型号： | AWAC24U |
| 厂商： | Artaflex Inc |
| 文件页数： | 4/11页 |
| 文件大小： | 0K |
| 描述： | 2.4GHZ WIRELESS USB DONGLE |
| 标准包装： | 100 |
| 频率： | 2.4GHz |
| 数据传输率 - 最大： | 1Mbps |
| 调制或协议： | DSSS，GFSK |
| 应用： | 通用 |
| 功率 - 输出： | 21dBm |
| 灵敏度： | -93dBm |
| 电源电压： | 5V |
| 电流 - 接收： | 48mA |
| 电流 - 传输： | 240mA |
| 数据接口： | 连接器，USB |
| 天线连接器： | 板载，跟踪 |
| 工作温度： | 0°C ~ 70°C |
| 包装： | 托盘 |
| 其它名称： | 748-1009 |
2.4GHz DSSS Wireless USB Dongle
AWAC24U
Data Sheet
4.3
Auto Transaction Sequencer (ATS)
The AWAC24U module provides automated support for transmission and reception of acknowledged data packets.
When transmitting a data packet, the device automatically starts the crystal and synthesizer, enters transmit mode, transmits the
packet in the transmit buffer, and then automatically switches to receive mode and waits for a handshake packet and then
automatically reverts to sleep mode or idle mode when either an ACK packet is received, or a timeout period expires.
Similarly, when receiving in transaction mode, the device waits in receive mode for a valid packet to be received, and then
automatically transitions to transmit mode, transmits an ACK packet, and then switches back to receive mode to await the next
packet. The contents of the packet buffers are not affected by the transmission or reception of ACK packets.
In each case, the entire packet transaction takes place without any need for micro controller firmware action; to transmit data the
micro controller simply needs to load the data packet to be transmitted, set the length, and set the TX GO bit. Similarly, when
receiving packets in transaction mode, firmware simply needs to retrieve the fully received packet in response to an interrupt
request indicating reception of a packet.
4.4
Data Rates
By combining the DATA_CODE_ADR code lengths and data transmission modes described above, the AWAC24U supports the
following modes and data rates.
Table 1 - Data Rates
RF Transmission Mode
GFSK
32-Chip 8DR
Raw Data Rate kbps
1,000.00
250.00
64-chip 8DR
[1]
125.00
32-chip DDR
64-chip DDR
[2]
[2]
62.50
31.25
64-chip SDR
[1,2]
15.63
5
Absolute Maximum Ratings
Storage Temperature ............................................................ –65°C to +150°C
Ambient Temperature with Power Applied............................. –55°C to +125°C
DC Voltage to Logic Inputs [3] ............................................... –0.3V to V IO +0.3V
DC Voltage applied to Outputs in High-Z State.................... –0.3V to V IO +0.3V
6
Operating Conditions
V CC (J2)…………………………………………………… 5.00V
V CC (USB)..…………………………..………..…………. 5.00V
T A (Ambient Temperature under Bias)…….......0°C to +70°C
Ground Voltage………………………………………………. 0V
Static Discharge Voltage (Digital) [4] ...................................................... >2000V
Static Discharge Voltage (RF) [4] ............................................................. 1100V
Latch-up Current ............................................................... +200 mA, –200 mA
Notes
[1]. Typically data modes with high chip encoding which provides a higher process gain and lower data rates provide longer range and / or a more
robust wireless link.
[2]. This mode is compatible with Cypress Generation 1 RF WirelessUSB transceiver devices, CYWUSB6934 and CYWUSB6935.
[3]. It is permissible to connect voltages above V IO to inputs through a series resistor limiting input current to 1 mA. AC timing not guaranteed.
[4]. Human Body Model (HBM).
Artaflex Inc.
215 Konrad Crescent
Markham, Ontario, Canada
DSAWAC24U Rev 1v2
October 25, 2010
L3R8T9
(905) 479-0148
Page 4 of 11
http://www.artaflexmodules.com
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