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参数资料
| 型号： | AXDA1600DUT3C |
| 厂商： | ADVANCED MICRO DEVICES INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1400 MHz, MICROPROCESSOR, CPGA453 |
| 封装： | OPGA-453 |
| 文件页数： | 3/106页 |
| 文件大小： | 2275K |
| 代理商： | AXDA1600DUT3C |
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88
Appendix B - Conventions and Abbreviations
AMD Athlon XP Processor Model 8 Data Sheet
25175H—March 2003
Preliminary Information
■
Invalid and Don’t-Care—In timing diagrams, signal ranges
that are invalid or don't-care are filled with a screen pattern.
Data Terminology
The following list defines data terminology:
■
Quantities
A word is two bytes (16 bits)
A doubleword is four bytes (32 bits)
A quadword is eight bytes (64 bits)
■
Addressing—Memory is addressed as a series of bytes on
eight-byte (64-bit) boundaries in which each byte can be
separately enabled.
■
Abbreviations—The following notation is used for bits and
bytes:
Kilo (K, as in 4-Kbyte page)
Mega (M, as in 4 Mbits/sec)
Giga (G, as in 4 Gbytes of memory space)
See Table 31 on page 89 for more abbreviations.
■
Little-Endian Convention—The byte with the address
xx...xx00 is in the least-significant byte position (little end).
In byte diagrams, bit positions are numbered from right to
left—the little end is on the right and the big end is on the
left. Data structure diagrams in memory show low addresses
at the bottom and high addresses at the top. When data
items are aligned, bit notation on a 64-bit data bus maps
directly to bit notation in 64-bit-wide memory. Because byte
addresses increase from right to left, strings appear in
reverse order when illustrated.
■
Bit Ranges—In text, bit ranges are shown with a dash (for
example, bits 9–1). When accompanied by a signal or bus
name, the highest and lowest bit numbers are contained in
brackets and separated by a colon (for example, AD[31:0]).
■
Bit Values—Bits can either be set to 1 or cleared to 0.
■
Hexadecimal and Binary Numbers—Unless the context
makes interpretation clear, hexadecimal numbers are
followed by an h and binary numbers are followed by a b.
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