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参数资料
| 型号： | BD8112EFV-ME2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 8/25页 |
| 文件大小： | 0K |
| 描述： | IC LED DRIVER 24-VSSOP |
| 应用说明： | Automotive Applications |
| 标准包装： | 1 |
| 恒定电流： | 是 |
| 拓扑： | 高端，低端，PWM，降压（降压），升压（升压） |
| 输出数： | 2 |
| 内部驱动器： | 两者兼有 |
| 类型 - 主要： | 车载，背光 |
| 类型 - 次要： | 高亮度 LED（HBLED），白色 LED |
| 频率： | 250kHz ~ 600kHz |
| 电源电压： | 5 V ~ 30 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VSSOP（0.220"，5.60mm 宽）裸露焊盘 |
| 供应商设备封装： | 24-HTSSOP |
| 包装： | 标准包装 |
| 工作温度： | -40°C ~ 105°C |
| 其它名称： | BD8112EFV-ME2DKR |
BD8112EFV-M
Technical Note
● Buck-Boost DC/DC controller
? Number of LEDs in series connection
Output voltage of the DCDC converter is controlled such that the forward voltage over each of the LEDs on the output is
set to 1.0V (Typ.). DCDC operation is performed only when the LED output is operating. When two or more LED outputs
are operating simultaneously, the LED voltage output is held at 1.0V (Typ.) per LED over the column of LEDs with the
highest VF value. The voltages of other LED outputs are increased only in relation to the fluctuation of voltage over this
column. Consideration should be given to the change in power dissipation due to variations in VF of the LEDs. Please
determine the allowable maximum VF variance of the total LEDs in series by using the description as shown below:
VF variation allowable voltage 3.7V (Typ.) = short detecting voltage 4.5V (Typ.) － LED control voltage 1.0V (Typ.)
The number of LEDs that can be connected in series is limited due to the open-circuit protection circuit, which engages at
85% of the set OVP voltage. Therefore, the maximum output voltage of the under normal operation becomes
30.6 V (= 36 V x 0.85, where (30.6 V – 1.0 V) / VF > N [maximum number of LEDs in series]).
? Over-voltage protection circuit (OVP)
The output of the DCDC converter should be connected to the OVP pin via a voltage divider. In determining an
appropriate trigger voltage of for OVP function, consider the total number of LEDs in series and the maximum variation in
VF. Also, bear in mind that over-current protection (OCP) is triggered at 0.85 x OVP trigger voltage. If the OVP
function engages, it will not release unless the DCDC voltage drops to 72.5% of the OVP trigger voltage. For example, if
ROVP1 (output voltage side), ROVP2 (GND side), and DCDC voltages VOUT are conditions for OVP, then:
VOUT ≥ (ROVP1 + ROVP2) / ROVP2 x 2.0 V.
OVP will engage when VOUT ≧ 32 V if ROVP1 = 330 k ? and ROVP2 = 22 k ? .
? Buck-boost DC/DC converter oscillation frequency (FOSC)
The regulator ’s internal triangular wave oscillation frequency can be set via a resistor connected to the RT pin (pin 5).
This resistor determines the charge/discharge current to the internal capacitor, thereby changing the oscillating frequency.
Refer to the following theoretical formula when setting RT:
fosc =
30 × 10 6
RT [ Ω ]
x α [kHz]
30 x 10 (V/A/S) is a constant (±5%) determined by the internal circuitry, and α is a correction factor that varies in relation
6
to RT:
{ RT: α = 50k ? : 0.94, 60k ? : 0.985, 70k ? : 0.99, 80k ? : 0.994, 90k ? : 0.996, 100k ? : 1.0,
150k ? : 1.01, 200k ? : 1.02, 300k ? : 1.03, 400k ? : 1.04, 500k ? : 1.045}
A resistor in the range of 47k ? ～ 523k ? is recommended. Settings that deviate from the frequency range shown below
may cause switching to stop, and proper operation cannot be guaranteed.
600k
500k
400k
300k
200k
100k
k
0
100
200
300
400
500
600
700
800
RT[k ? ]
Fig.15 RT versus switching frequency
? External DC/DC converter oscillating frequency synchronization (FSYNC)
Do not switch from external to internal oscillation of the DC/DC converter if an external synchronization signal is present
on the SYNC pin. When the signal on the SYNC terminal is switched from high to low, a delay of about 30 μs (typ.)
occurs before the internal oscillation circuitry starts to operate (only the rising edge of the input clock signal on the SYNC
terminal is recognized). Moreover, if external input frequency is less than the internal oscillation frequency, the internal
oscillator will engage after the above-mentioned 30 μs (typ.) delay; thus, does not input a synchronization signal with a
frequency less than the internal oscillation frequency.
www.rohm.com
? 2010 ROHM Co., Ltd. All rights reserved.
8/22
2011.08 - Rev.C
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