参数资料
| 型号： | BD8157EFV-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC POWER SUP 1-CH HTSSOP-B20 |
| 标准包装： | 2,500 |
| 应用： | TFT-LCD 面板：伽玛缓冲器，VCOM 驱动器 |
| 电流 - 电源： | 1.2mA |
| 电源电压： | 2.1 V ~ 4 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-HTSSOP-B |
| 包装： | 带卷 (TR) |
BD8151EFV, BD8157EFV
Technical Note
(9) Setting R C , C C of the phase compensation circuit
In the current mode control, since the coil current is controlled, a pole (phase lag) made by the CR filter composed of the
output capacitor and load resistor will be created in the low frequency range, and a zero (phase lead) by the output
capacitor and ESR of capacitor will be created in the high frequency range. In this case, to cancel the pole of the power
amplifier, it is easy to compensate by adding the zero point with C C and R C to the output from the error amplifier as shown
in the illustration.
Open loop gain
A
fp(Min)
fp =
1
2 ? ? Ro ? Co
[Hz]
Gain
0
fp(Max)
fz (ESR) =
1
2 ? ? E SR ? Co
[Hz]
【 dB 】
l OUT Min
0
l OUT Max
fz(ESR)
Pole at the power amplification stage
When the output current reduces, the load resistance
R O increases and the pole frequency lowers.
Phase
【 deg 】
-90
fp(Min) =
1
2 ? ? Ro Max ? Co
[Hz]
(At light-load)
Error amplifier phase compensation
fz(Max) =
1
2 ? ? Ro Min ? Co
[Hz]
(At heavy-load)
Gain
【 dB 】
A
0
Zero at the power amplification stage
When the output capacitor is set larger, the pole
frequency lowers but the zero frequency will not
change. (This is because the capacitor ESR
becomes 1/2 when the capacitor becomes 2 times.)
0
Phase
【 deg 】 -90
fp (Amp.) =
1
2 ? ? Rc ? Cc
[Hz]
Fig. 34 Gain vs Phase
L
Vo
V CC
Cin
COMP
Vcc,PVcc
SW
ESR
Co
Ro
Rc
GND,PGND
Cc
Fig. 35 Application Circuit Diagram
It is possible to realize the stable feedback loop by canceling the pole fp (Min.), which is created by the output capacitor
and load resistor, with CR zero compensation of the error amplifier as shown below.
fz (Amp.) = fp (Min.)
1
1
2 ? ? Rc ? Cc
=
2 ? ? Romax ? Co
[Hz]
As the setting range for the resistor, 1 k ? to 10 k ? is recommended. When the resistor is set to 1 k ? or lower, the effect by
phase compensation becomes low and it may cause the oscillation of output voltage. When it is set to 10 k ? or larger, the
COMP pin becomes Hi-Z and the switching noise becomes easy to superpose. Therefore the stable switching pulse
cannot be generated and the irregular ripple voltage may be generated on the output voltage.
As the setting range for the capacitance, 3,300 pF to 10,000 pF is recommended. When the capacitance is set to 3,300 pF
or lower, the irregular ripple voltage may be generated on the output voltage due to the effect of switching noise. When it is
set to 10,000 pF or larger, the response becomes worse and the output voltage fluctuation becomes large. Accordingly it
may require the output capacitor which is larger than the necessary value.
www.rohm.com
? 2009 ROHM Co., Ltd. All rights reserved.
11/17
2009.07 - Rev.B
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