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参数资料
| 型号： | BD9740KN-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 12/15页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BST INV SYNC 48UQFN |
| 标准包装： | 2,500 |
| 类型： | 降压（降压），升压（升压），反相 |
| 输出数： | 7 |
| 输入电压： | 1.5 V ~ 10 V |
| 频率 - 开关： | 100kHz ~ 1.2MHz |
| 电流 - 输出： | 30mA |
| 同步整流器： | 是 |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 48-UQFN |
BD9739KN,BD9740KN
Technical Note
This monolithic IC contains P isolation and P substrate layers between adjacent elements to keep them isolated. P–N
● Notes for use
1) Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as
fuses.
2) Reverse polarity connection of the power supply
Connecting the of power supply in reverse polarity can damage IC. Take precautions when connecting the power supply
lines. An external direction diode can be added.
3) Power supply lines
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals
to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the
circuit, note that capacitance characteristic values are reduced at low temperatures.
4) GND voltage
Ground-GND potential should maintain at the minimum ground voltage level. Furthermore, no terminals should be lower
than the GND potential voltage including an electric transients.
5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
6) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if positive and ground power supply terminals are reversed. The IC may also be damaged if pins are
shorted together or are shorted to other circuit’s power lines.
7) Operation in a strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
8) ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
9) Thermal shutdown circuit (TSD circuit)
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is
designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect the IC or guarantee its
operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of
this circuit is assumed.
10) Capacitors connected between output and ground pins
If a large capacitance value is connected between the output and ground pins, and if the VCC falls to 0 V or becomes
shorted with the ground pin, the current stored in the capacitor may flow to the output pin. This can cause damage to the
IC. Set capacitors connected between the output and ground pins to values that fall within the recommended range.
11) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to, or
removing it from a jig or fixture, during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting and storing the IC.
12) Regarding input pin of the IC (Fig 11)
+
junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or
transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P–N junction operates as a parasitic diode.
When Pin B > GND > Pin A, the P–N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
www.rohm.com
? 2010 ROHM Co., Ltd. All rights reserved.
12/14
2010.09 - Rev.A
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