参数资料
型号: BD9845FV-E2
厂商: Rohm Semiconductor
文件页数: 12/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 14-SSOP
标准包装: 1
PWM 型: 控制器
输出数: 1
频率 - 最大: 1.5MHz
占空比: 100%
电源电压: 3.6 V ~ 35 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 14-LSSOP(0.173",4.40mm 宽)
包装: 标准包装
产品目录页面: 1373 (CN2011-ZH PDF)
其它名称: BD9845FV-E2DKR
BD9845FV
2) Example of overcurrent protection circuit
Insert a sense resistor between the source and VIN of output
Pch-FET for detecting overcurrent as shown in the figure.
Refer to the formula below for determining a sense resistor and
Technical Note
VIN
select permissible loss ensuring a margin.
OCP+
R1
C4
8
センス抵抗
Rsense =
Vocpth
Iocp
Vocpth : Overcurrent detection voltage (50 mV typ)
OCP comp
Vocpth=50mV
9
OCP-
C1
R2
Sense
resistor
C3
Iocp : Overcurrent detection setting current
Iocp is a peak current Isw (peak) here, and the amperage for
output load is an overcurrent setting amperage minus ripple
current component (Delta I L /2), etc. (See the formula on P10.)
There is a time delay approx 200ns from detection until stop of
output is made (pulse of approx 100 ns causes delay time but
detection is made), and an error may be caused from the value
above.
In addition, input to overcurrent detection unit is such a
sensitive circuit, and wrong detection by noise may be possible.
When wrong detection occurs, try to eliminate noise by the
resistor R1 and R2 or capacitance C1, C2, C3, and C4 shown
above.
3) Example of output ON/OFF control circuit
VREF
6
C2
OUT
Fig.38
When stopping the whole circuit, set STB terminal to
"Low (STB<0.5V) to stop switching and reduce power
consumption of IC to 0 microA (typ).
Also when switching ON and OFF for each channel,
control is fixed to OFF by setting DT terminal of
desired channel to "Low (DT<1.25V)". This control is
independent for each channel, and when DT="L", SS
Each Ch
control signal
D
T
SS
14
13
1.25Vtyp.
To OUT for each Ch
DTcomp
terminal and FB terminal are also discharged, and soft
start is enabled in restarting.
Digital transistor, etc.
Fig.39
4) Example of master/slave (sync multi-ch output) operation circuit
This IC is set to slave mode by setting the input of STB terminal at 2.5V ? 0.1V, and multi-channel output is enabled with
frequency synchronized. (Fig.40) However, CT terminal has high impedance in slave mode status, and triangular wave is
generated by CT waveform of master mode IC. Therefore the example of master slave circuit below is recommended
when starting and stopping in order to avoid malfunction by start/stop timing of master IC and slave IC. As for output, it is
recommended to control ON/OFF reliably with DT terminal.
STB信号
マスタIC
Also, oscillation frequency is determined by capacitor (C CT )
connected to CT. When the slave IC is large in number as
well as oscillation frequency is high, parasitic capacity by
マスタ
Master STB
Master IC
STB
CT
共通
Common
CT
スレ
Slave ブIC
STB
×N
board wiring in contact with CT cannot be ignored, and preset
frequency may be drifted. Be careful.
Example of master/slave circuit configuration is shown below.
If any other configuration is to be applied, inform our
personnel in charge.
マス a signal of た
Input タと同期 し high voltage
synchronized 号 入力
High電圧2.5Vの 信 with を master.
Fig.40
CT
CT
Master IC
C CT
Slave IC
SEL
VREF
SEL
VREF
Stand-by
0.1uF
10kΩ
0.1uF
10kΩ
ON/OFF
STB
DT
STB
DT
Ch
ON/OFF
control
DTC114Y
Ch
ON/OFF
control
DTC114Y
Fig 41. Example of master/slave
www.rohm.com
? 2011 ROHM Co., Ltd. All rights reserved.
12/15
2011.08 - Rev.D
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