参数资料
型号: BD9845FV-E2
厂商: Rohm Semiconductor
文件页数: 9/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 14-SSOP
标准包装: 1
PWM 型: 控制器
输出数: 1
频率 - 最大: 1.5MHz
占空比: 100%
电源电压: 3.6 V ~ 35 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 14-LSSOP(0.173",4.40mm 宽)
包装: 标准包装
产品目录页面: 1373 (CN2011-ZH PDF)
其它名称: BD9845FV-E2DKR
BD9845FV
7) STB /SEL(Standby/Master/Slave function)
Standby mode and normal mode can be switched by STB terminal (4pin).
1. When STB<0.5V, standby mode is set.
Out put stop (OUT=H) and REG also stops. Circuit current is also Isc = 0 uA here.
2. When STB>3.0V, normal operation mode is set.
All circuits operate. Use the controller normally in this range.
Master mode and slave mode can be switched by SEL terminal (10pin).
1. When SEL<0.5V, master mode is set.
All circuits operate.
Technical Note
2.
When SEL>0.5V, slave mode is set.
Operation status is set , but OSC block alone is stopped, CT terminal is High-Z here, and triangular wave is not
output.(PWM circuit and protection circuit perform the same operation as usual.) Therefore, if the controller is used in
this more without using master IC, triangular wave is not emitted, operation is unstable, and normal output cannot be
obtained. Be careful.
8) OUT (Output: External FET gate drive)
OUT terminal (6pin) is capable of directly driving the gate of
external (PchMOS) FET. Amplitude of output is restricted
between Vcc and C5V (Vcc-5V), and is not restricted by
voltage resistance of gate by input voltage, which allows
broad selection of FET.
However, for precaution when selecting FET, there is a
1.E-07
1.E-08
Cout_max
Cout_max
(Vcc=10V)
Cout_max
(Vcc=20V)
Cout_max
(Vcc=30V)
restriction that input capacity of gate is determined by
current capability of C5V and permissible loss of IC,
therefore refer to the permissible range in the graph on the
right when determining FET.
1.E-09
Fig.35 OUT 端子外付け容量許容範囲
Per m is s ible r ange
Area below each line under each condition
1.E-10
100
1000
10000
Switching f requency [kHz]
Fig.36
9) Protection (other protection functions)
This IC is equipped with low input malfunction prevention circuit (UVLO) and abnormal temperature protection circuit
(TSD) in addition to overcurrent detection circuit (OCP).
Low input malfunction prevention circuit is for preventing unstable output when input voltage is low.
Three positions of Vcc (3.2V), VREF(2.35V), and C5V(Vcc-3V) are monitored, and output is made only when all are
canceled. (See the timing chart.)
Abnormal temperature protection circuit is for protecting IC chip from destruction for preventing runaway when abnormal
heating is caused on IC exceeding rated temperature. (It does not operate normally.)
Apply a design with full margin allowed for heating in consideration of permissible loss.
www.rohm.com
? 2011 ROHM Co., Ltd. All rights reserved.
9/15
2011.08 - Rev.D
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