参数资料
| 型号： | BR24C21FV-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 7/21页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM EDID 1K 100KHZ 8-SSOP |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 1K (128 x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-LSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-SSOPB |
| 包装： | 标准包装 |
| 其它名称： | BR24C21FV-E2DKR |
BR24C21xxx Series (1K)
Datasheet
○ Random Read
The Random read operation allows the Master to access any memory location. This operation involves a two-step
process. First, the Master issues a Write command that includes the START condition and the Slave address field (with
R/W set to “0”) followed by the word address of the word to be read. This procedure sets the internal address counter of
the BR24C21/F/FJ/FV to the desired address. After the word address Acknowledge is received by the Master, the
Master immediately re-issues a START condition followed by the Slave address field with R/W set to “1.” The device will
respond with an Acknowledge and then transmit the 8-data bits stored at the addressed location. If the Master does not
acknowledge the transmission but does generate the STOP condition, the IC will discontinue transmission.
SDA
LINE
S
T
A
R
T
SLAVE
ADDRESS
1 0 1 0 * * *
W
R
I
T
E
WORD
ADDRESS（ｎ）
WA
* 6
WA
0
S
T
A
R
T
SLAVE
ADDRESS
1 0 1 0 * * *
R
E
A
D
D7
DATA(n)
D0
S
T
O
P
R A
/ C
W K
A
C
K
R A
/ C
W K
A
C
K
*:Don ’ t care
Figure 11. Random Read Cycle Timing
○ Sequential Read
? If the Master does not transfer an Acknowledge and does not generate a STOP condition during the current Read
operation, the BR24C21/F/FJ/FV continues to output the next address data in sequence. For Read operations, all bits
in the address counter are incremented, allowing the entire array to be read during a single operation. When the
counter reaches the top of the array, it will “roll over” to the bottom of the array and continue to transmit data.
? If the Master does not acknowledge the transmission but does generate a STOP condition, at this point the device
discontinues transmission.
? The sequential Read operation can be performed with both Current Read and Random Read.
S
T
A
R
T
SLAVE
ADDRESS
R
E
A
D
DATA(n)
DATA(n+x)
S
T
O
P
SDA
LINE
1 0 1 0 * * *
R A
/ C
W K
D7
D0
A
C
K
A
C
K
D7
D0
*:Don ’ t care
A
C
K
Figure 12. Sequential Read Cycle Timing
(Current Read)
www.rohm.com
? 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
7/18
TSZ02201-0R2R0G100270-1-2
10.Jul.2012 Rev.001
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