参数资料
| 型号： | BR24C21FV-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 8/21页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM EDID 1K 100KHZ 8-SSOP |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 1K (128 x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-LSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-SSOPB |
| 包装： | 标准包装 |
| 其它名称： | BR24C21FV-E2DKR |
BR24C21xxx Series (1K)
Datasheet
● Software Reset
Execute software reset in case the device is at an unexpected state after power up and/or the command input needs to be
reset. The following figures (Figure 13-(a), Figure 13-(b), Figure 13-(c))
During dummy clock, please release SDA BUS (tied to Vcc by pull up resistor).
During that time, the device may pull the SDA line Low for acknowledge or outputting read data. If the master controls the
SDA line High, it will conflict with the device output Low then it makes a current overload. It may cause instantaneous power
down and may damage the device.
Dummy Clock × 14
Start × 2
SCL
1
2
13
14
COMMAND
SDA
Figure 13-(a) Dummy Clock × 14 ＋ Start ＋ Start
COMMAND
Start
Dummy Clock × 9
Start
SCL
1
2
8
9
COMMAND
SDA
Figure 13-(b) Start ＋ Dummy Clock × 9 ＋ Start
Start×9
COMMAND
SCL
1
2
3
7
8
9
COMMAND
SDA
COMMAND
Figure 13-(c) Start × 9
● Acknowledge Polling
Since the device ignores all input commands during the internal write cycle, no ACK will be returned. When the master sends
the next command following the write command, and the device returns the ACK, it means that the program is completed. If no
ACK is returned, it means that the device is still busy. By using Acknowledge polling, the waiting time is minimized to less than
tWR=5ms. To prevent operating Write or Current Read immediately after Write, first send the slave address (R/W is "High" or
"Low"). After the device returns the ACK, continue word address input or data output, respectively.
During the internal write
THE FIRST WRITE COMMAND
cycle,
no ACK will be returned.
T WRITE COMMAND
A
C
K
S
A
R
T
S
T
O
P
S
T SLAVE
A
R ADDRESS
T
A
C
K
H
S
T SLAVE
A
R ADDRESS H
T
…
tWR
THE SECOND WRITE COMMAND
…
S
T SLAVE
A
R ADDRESS
T
A
C
K
H
S
T SLAVE
A
R ADDRESS
T
A
C
K
L
WORD
ADDRESS
A
C
K
L
DATA
A
C
K
L
S
T
O
P
tWR
After the internal write cycle
is completed ACK will be returned
(ACK=Low). Then input next
Word Address and data.
Figure 14. Successive Write Operation By Acknowledge Polling
www.rohm.com
? 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
8/18
TSZ02201-0R2R0G100270-1-2
10.Jul.2012 Rev.001
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