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参数资料
| 型号： | BS62UV256JC |
| 厂商： | BRILLIANCE SEMICONDUCTOR, INC. |
| 英文描述： | Ultra Low Power/Voltage CMOS SRAM 32K X 8 bit |
| 中文描述： | 超低功率/电压CMOS SRAM的32K的× 8位 |
| 文件页数： | 6/11页 |
| 文件大小： | 331K |
| 代理商： | BS62UV256JC |
Revision 2.2
April 2001
4
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
BS62UV256 -15
MIN. TYP. MAX.
UNIT
t
AVAX
t
RC
Read Cycle Time
150
--
ns
t
AVQV
t
AA
Address Access Time
--
150
ns
t
ELQV
t
ACS
Chip Select Access Time
--
150
ns
t
GLQV
t
OE
Output Enable to Output Valid
--
100
ns
t
ELQX
t
CLZ
Chip Select to Output Low Z
10
--
ns
t
GLQX
t
OLZ
Output Enable to Output in Low Z
10
--
ns
t
EHQZ
t
CHZ
Chip Deselect to Output in High Z
0--
35
ns
t
GHQZ
t
OHZ
Output Disable to Output in High Z
0--
30
ns
t
AXOX
t
OH
Output Disable to Output Address Change
10
--
ns
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
5ns
0.5Vcc
AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc = 2.0V )
READ CYCLE
AC TEST CONDITIONS
AC TEST LOADS AND WAVEFORMS
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
DON T CAR
ANY CHANG
PERMITTED
E:
CHANGE :
E
STATE
DOES NOT
APPLY
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
MAY CHANGE
FROM L TO H
WILL BE
CHANGE
FROM L TO H
,
800
THEVENIN EQUIVALENT
ALL INPUT PULSES
→
10%
90%
←
Vcc
GND
→
← 5ns
90%
10%
1.2V
OUTPUT
FIGURE 2
2V
OUTPUT
INCLUDING
JIG AND
SCOPE
1333
2000
5PF
FIGURE 1B
2V
OUTPUT
INCLUDING
JIG AND
SCOPE
1333
100PF
FIGURE 1A
2000
BSI
BS62UV256
R0201-BS62UV256
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BS-632-1 | 制造商:PennEngineering (PEM) 功能描述: |
| BS6322 | 制造商:n/a 功能描述:Ships in 2 days |
| BS-632-2 | 制造商:PennEngineering (PEM) 功能描述: |
| BS640GBC3V | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| BS640GBC4V | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit), 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
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