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参数资料
| 型号： | BU-61840B3-102W |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| 封装： | 0.815 X 0.815 INCH, 0.140 INCH HEIGHT, BGA-128 |
| 文件页数： | 27/60页 |
| 文件大小： | 763K |
| 代理商： | BU-61840B3-102W |
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33
Data Device Corporation
www.ddc-web.com
BU-6174X/6184X/6186X
D-03/02-250
15
13
0
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND
WORD
CONFIGURATION
REGISTER #1
MONITOR COMMAND
STACK POINTERS
MONITOR
COMMAND STACKS
CURRENT
AREA B/A
MONITOR DATA
STACKS
MONITOR DATA
BLOCK #N + 1
MONITOR DATA
BLOCK #N
CURRENT
COMMAND WORD
MONITOR DATA
STACK POINTERS
IF THIS BIT IS "0" (NOT SELECTED)
NO WORDS ARE STORED IN EITHER
THE COMMAND STACK OR DATA STACK.
IN ADDITION, THE COMMAND AND DATA
STACK POINTERS WILL NOT BE UPDATED.
NOTE
SELECTIVE MONITOR
LOOKUP TABLES
SELECTIVE MONITOR
ENABLE
(SEE NOTE)
OFFSET BASED ON
RTA4-RTA0, T/R, SA4
FIGURE 11. SELECTIVE MESSAGE MONITOR MEMORY MANAGEMENT
TIME TAG
The Enhanced Mini-ACE includes an internal read/writable Time
Tag Register. This register is a CPU read/writable 16-bit counter
with a programmable resolution of either 2, 4, 8, 16, 32, or 64 s
per LSB. Another option allows software controlled incrementing
of the Time Tag Register. This supports self-test for the Time Tag
Register. For each message processed, the value of the Time
Tag Register is loaded into the second location of the respective
descriptor stack entry ("TIME TAG WORD") for both the BC and
RT modes.
The functionality involving the Time Tag Register that's compati-
ble with ACE/Mini-ACE (Plus) includes: the capability to issue an
interrupt request and set a bit in the Interrupt Status Register
when the Time Tag Register rolls over FFFF to 0000; for RT
mode, the capability to automatically clear the Time Tag Register
following reception of a Synchronize (without data) mode com-
mand, or to load the Time Tag Register following a Synchronize
(with data) mode command.
Additional time tag features supported by the Enhanced Mini-
ACE include the capability for the BC to transmit the contents of
the Time Tag Register as the data word for a Synchronize (with
data) mode command; the capability for the RT to "filter" the data
word for the Synchronize with data mode command, by only
loading the Time Tag Register if the LSB of the received data
word is "0"; an instruction enabling the BC Message Sequence
Control engine to load the Time Tag Register with a specified
value; and an instruction enabling the BC Message Sequence
Control engine to write the value of the Time Tag Register to the
General Purpose Queue.
INTERRUPTS
The Enhanced Mini-ACE series terminals provide many pro-
grammable options for interrupt generation and handling. The
interrupt output pin (INT) has three software programmable
modes of operation: a pulse , a level output cleared under soft-
ware control, or a level output automatically cleared following a
read of the Interrupt Status Register (#1 or #2).
Individual interrupts are enabled by the two Interrupt Mask
Registers. The host processor may determine the cause of the
interrupt by reading the two Interrupt Status Registers, which
provide the current state of interrupt events and conditions. The
Interrupt Status Registers may be updated in two ways. In one
interrupt handling mode, a particular bit in Interrupt Status
Register #1 or #2 will be updated only if the event occurs and the
corresponding bit in Interrupt Mask Register #1 or #2 is enabled.
In the enhanced interrupt handling mode, a particular bit in one
of the Interrupt Status Registers will be updated if the event/con-
dition occurs regardless of the value of the corresponding
Interrupt Mask Register bit.
In either case, the respective
Interrupt Mask Register (#1 or #2) bit is used to enable an inter-
rupt for a particular event/condition.
The Enhanced Mini-ACE supports all the interrupt events from
ACE/Mini-ACE (Plus), including RAM Parity Error, Transmitter
Timeout, BC/RT Command Stack Rollover, MT Command Stack
and Data Stack Rollover, Handshake Error, BC Retry, RT Address
Parity Error, Time Tag Rollover, RT Circular Buffer Rollover, BC
Message, RT Subaddress, BC End-of-Frame, Format Error, BC
Status Set, RT Mode Code, MT Trigger, and End-of-Message.
相关PDF资料 |
PDF描述 |
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| BU-61860B3-300W | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| BU-61860B4-100K | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| BU-61860B4-100 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| BU-61740B3-500Q | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
| BU-61740B3-502L | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA128 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| BU-61840B3NEW | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MIL-STD-1553 Components |μ-ACE (Micro-ACE?) |
| BU-61843 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MIL-STD-1553 Components |Enhanced Mini-ACE? |
| BU-61843F3-100 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Telecommunication IC |
| BU-61843F3-110 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Telecommunication IC |
| BU-61843F4-100 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Telecommunication IC |
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