参数资料
型号: BU-63825D1-301
厂商: DATA DEVICE CORP
元件分类: 微控制器/微处理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70
封装: CERAMIC, DIP-70
文件页数: 8/48页
文件大小: 405K
代理商: BU-63825D1-301
16
Data Device Corporation
www.ddc-web.com
BU-63825
C-02/06-0
63825 include options for full software control of RT Status and
Built-in-Test (BIT) words. Alternatively, for 1553B applications,
these words may be formulated in real time by the BU-63825
protocol logic.
The BU-63825 RT protocol design implements all the MIL-STD-
1553B message formats and dual redundant mode codes. This
design is based largely on previous generation products that
have passed SEAFAC testing for MIL-STD-1553B compliance.
The Sp’ACE II RT performs comprehensive error checking, word
and format validation, and checks for various RT-to-RT transfer
errors. Other key features of the BU-63825 RT include a set of
interrupt conditions, internal command illegalization, and pro-
grammable busy by subaddress.
RT MEMORY ORGANIZATION
TABLE 28 illustrates a typical memory map for the Sp’ACE II in
RT mode. As in BC mode, the two Stack Pointers reside in fixed
locations in the shared RAM address space: address 0100 (hex)
for the Area A Stack Pointer and address 0104 for the Area B
Stack Pointer. Besides the Stack Pointer, for RT mode there are
several other areas of the BU-63825 address space designated
as fixed locations. All RT modes of operation require the Area A
and Area B Lookup Tables. Also allocated, are several fixed loca-
tions for optional features: Command Illegalization Lookup Table,
Mode Code Selective Interrupt Table, Mode Code Data Table,
and Busy Bit Lookup Table. It should be noted that any unen-
abled optional fixed locations may be used for general purpose
storage (data blocks).
The RT Lookup tables, which provide a mechanism for mapping
data blocks for individual Tx/Rx/Bcst-subaddresses to areas in
the RAM, occupy address range locations 0140 to 01BF for Area
A and 01C0 to 023F for Area B. The RT lookup tables include
Subaddress Control Words and the individual Data Block
Pointers. If used, address range 0300-03FF will be dedicated as
the illegalizing section of RAM. The actual Stack RAM area and
the individual data blocks may be located in any of the nonfixed
areas in the shared RAM address space.
RT MEMORY MANAGEMENT
Another salient feature of the Sp’ACE II series products is the flex-
ibility of its RT memory management architecture. The RT archi-
tecture allows the memory management scheme for each transmit,
receive, or broadcast subaddress to be programmable on a sub-
address basis. Also, in compliance with MIL-STD-1553B Notice 2,
the BU-63825 provides an option to separate data received from
broadcast messages from nonbroadcast received data.
Besides supporting a global double buffering scheme (as in BC
mode), the Sp’ACE II RT provides a pair of 128-word Lookup
Tables for memory management control, programmable on a
subaddress basis (refer to TABLE 29). The 128-word tables
include 32-word tables for transmit message pointers and
receive message pointers. There is also a third, optional Lookup
Data Block 476
3FE0-3FFF
Data Block 6
0420-043F
Data Block 5
0400-041F
Command Illegalizing Table (fixed area)
0300-03FF
RESERVED
Data Block 1-4
0280-02FF
Data Block 0
0260-027F
(not used)
0248-025F
Busy Bit Lookup Table (fixed area)
0240-0247
Lookup Table B (fixed area)
01C0-023F
Lookup Table A (fixed area)
0140-01BF
Mode Code Data (fixed area)
0110-013F
Mode Code Selective Interrupt Table (fixed area)
0108-010F
Stack Pointer B (fixed location)
0104
RESERVED
0101-0103
Stack Pointer A (fixed location)
0100
Stack A
0000-00FF
DESCRIPTION
ADDRESS
(HEX)
0105-0107
TABLE 28. TYPICAL RT MEMORY MAP
(SHOWN FOR 16K RAM)
Table for broadcast message pointers, providing Notice 2 com-
pliance, if necessary.
The fourth section of each of the RT Lookup Tables stores the 32
Subaddress Control Words (refer to TABLE 11 and TABLE 30).
The individual Subaddress Control Words may be used to select
the RT memory management option and interrupt scheme for
each transmit, receive, and (optionally) broadcast subaddress.
Subaddress
Control Word
Lookup Table
(Optional)
SACW_SA0
.
SACW_SA31
0220
.
023F
01A0
.
01BF
Broadcast
Lookup Table
Optional
Bcst_SA0
.
Bcst_SA31
0200
.
021F
0180
.
019F
Transmit
Lookup Table
Tx_SA0
.
Tx_SA31
01E0
.
01FF
0160
.
017F
Receive
(/Broadcast)
Lookup Table
Rx(/Bcst)_SA0
.
Rx(/Bcst)_SA31
01C0
.
01DF
0140
.
015F
COMMENT
DESCRIPTION
AREA B
AREA A
TABLE 29. LOOK-UP TABLES
相关PDF资料
PDF描述
BU-63925F0-200 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70
BU-63925G6-190 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDSO70
BU-63825D3-200 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70
BU-63825G1-300 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDSO70
BU-63925D6-191 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70
相关代理商/技术参数
参数描述
BU-63-9 功能描述:测试电夹 White Insul Alligato RoHS:否 制造商:Pomona Electronics 类型:Minigrabber clip 颜色:Black
BU-63C-0 功能描述:测试电夹 Black Insul Alligato RoHS:否 制造商:Pomona Electronics 类型:Minigrabber clip 颜色:Black
BU-63C-2 功能描述:测试电夹 Red Insul Alligator RoHS:否 制造商:Pomona Electronics 类型:Minigrabber clip 颜色:Black
BU-63C-4 功能描述:测试电夹 Yellow Insul Alligat RoHS:否 制造商:Pomona Electronics 类型:Minigrabber clip 颜色:Black
BU-63C-5 功能描述:测试电夹 Green Insul Alligato RoHS:否 制造商:Pomona Electronics 类型:Minigrabber clip 颜色:Black