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参数资料
| 型号： | BU-64840B3-E02 |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, PBGA324 |
| 封装： | BGA-324 |
| 文件页数： | 2/4页 |
| 文件大小： | 683K |
| 代理商： | BU-64840B3-E02 |
Data Device Corporation
www.ddc-web.com
BU-6474XB / BU-6484XB / 6486XB / 6584XB / 6586XB/61740B3/61840B3/61860B3
REV CODE 8
Figure 1: Micro-ACE TE BGA Outline
Drawing
Smallest Extended Industrial Temperature Range
MIL-STD-1553 Micro-ACE TE Terminal
- 324-Ball Plastic BGA
- Single 3.3V supply required for 3.3V transceiver versions
- 5 Volt-Tolerant Logic Signals (PCI signals are NOT 5V tolerant)
- Multiple thermal balls allow direct heat-sinking to PCB
- 3.3V transceivers have SLEEPIN input to reduce transceiver
power further
Smallest Complete MIL-STD-1553 Micro-ACE Terminal
- 128-Ball Plastic BGA
- 0.815 x 0.815 inch Maximum Footprint Size
- 0.120 inch Maximum Height
- Thermal Balls to Improve Heatsinking
- -40° to +85°C Temperature Range
Most Autonomous BC Architecture
- Built in message control engine offloads host processor
- Control/Status Block for each message
- Minor and Major Frame Scheduling to control timing of 1553 messages
- High and Low Priority Asynchronous Message Insertion
- Conditional Messages of Subroutines based on User Defined Conditions
- Defined Set of Opcodes for Message Status, Time Tag, Immediate Data
and Interrupt History
- Legacy mode for compatibility with ACE and Mini-ACE applications
Remote Terminal Flexibility
- Multiprotocol: Mil-STD-1553A/B, STANAG-3838
- Choice of Subaddress Single Message, Double Buffering*
or Circular Buffering; or Global Circular Buffering
- 50% and 100% Circular Buffer Rollover Interrupts
- Hardware or Software Programmable RT Address
- Programmable Command Illegalization
- Programmable Busy by Subaddress
- Interrupts on All Messages, or Individual Subaddresses
and/or Mode codes
- 32-entry Interrupt Status Queue
- Ball-strappable for RT AUTO-BOOT (MIL-STD-1760 Applications):
Initialize to RT Mode with Busy bit SET Following Power-UP
True Message Monitor
- Selective Message Monitor Filter Based on RT Address,
T/R bit, Subaddress
- Command and Data Stacks
- 50% and 100% Rollover Interrupts
- 32-Entry Interrupt Status Queue
Autonomous Built-In Self-Test
- Protocol Self-Test
- RAM Self-Test
- Online Loopback Test
- Capability for CH. A-to-CH.B Wraparound Test
- Capability to Test Transmitter Timeout Function
Processor Bus or PCI Interface Flexibility
- Direct Interface to 8,16 or 32-bit Microprocessor or
Microcontrollers
- Support for DMA Interface to External RAM*
- PCI versions have 33 MHz, 32-bit PCI target interface
- Supports 3.3V Logic Interface
Extensive User Configurability
- All devices can be used with external transceivers
- Software programmable divider to enable master 1553 clock
of 10, 12, 16 or 20 MHz
- RT Auto-Boot Option
Hardware Evaluation Tool
- DDC Part# BU-64863B8-600: Daisy chain mechanical
samples, with onboard die and ball pairs internally wired,
for environmental (mechanical / thermal) integrity testing
* Not available for PCI Micro-ACE TE
2
Figure 2: Micro-ACE BGA Outline
Drawing
.0394 [1.00]
(TYP)
.815 [20.70]
(MAX)
SQUARE
.670 [17.02]
(TYP)
17 EQ. SP. @
.0394 [1.00] = .670 [17.02]
(TOL NONCUM)
(TYP)
.065 [1.65]
(TYP)
.065 [1.65]
(TYP)
Triangle denotes
Ball A1
V U T R P N M L K J H G F E D C B A
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SIDE VIEW
.022 [0.56] DIA
Sn/Pb BALL
(324 PLACES)
0.120 [3.05]
(MAX)
0.015 [0.38]
(REF)
BOTTOM VIEW
Notes:
1)
Dimensions are in inches (mm).
.032 [0.81]
(REF)
.025 [0.64] DIA
Sn/Pb BALL
(127 PLACES)
0.140 [3.58]
(MAX)
SIDE VIEW
V U T R P N M L K J H G F E D C B A
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
.0394 [1.00]
(TYP)
.815 [20.70]
(MAX)
SQUARE
.670 [17.02]
(TYP)
17 EQ.SP.
.0394 [1.00] = .670 [17.02]
(TOL NONCUM)
(TYP)
.065 [1.65]
(TYP)
.065 [1.65]
(TYP)
BOTTOM VIEW
TOP VIEW
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