Datasheet
21
Pentium III Processor for the PGA370 Socket at 500 MHz to 1.13 GHz
NOTES:
1. 0 = Processor pin connected to VSS.
2. 1 = Open on processor; may be pulled up to TTL VIH on baseboard.
3. To ensure a system is ready for the Pentium III and Celeron processors, the values in BOLD in Table 2 should
be supported.
Note that the ‘1111’ (all opens) ID can be used to detect the absence of a processor core in a given
socket as long as the power supply used does not affect these lines. Detection logic and pull-ups
should not affect VID inputs at the power source (see Section 7.0).
The VID pins should be pulled up to a TTL-compatible level with external resistors to the power
source of the regulator only if required by the regulator or external logic monitoring the VID[3:0]
signals. The power source chosen must be guaranteed to be stable whenever the supply to the
voltage regulator is stable. This will prevent the possibility of the processor supply going above the
specified VCCCORE in the event of a failure in the supply for the VID lines. In the case of a DC-to-
DC converter, this can be accomplished by using the input voltage to the converter for the VID line
pull-ups. A resistor of greater than or equal to 10 k
maybe usedtoconnect the VID signalstothe
converter input. Note that no changes have been made to the physical connector or pin definitions
between the Intel-enabled VRM 8.2 and VRM 8.4 specifications.
Note:
VRM 8.5 specification uses five VID pin assignments VID[3:0, 25mV] and it is not compatible
with VRM 8.4. Some Pentium III processors with CPUID 068xh are capable of supporting both
VRM 8.4 and VRM 8.5 specifications. Please refer to the Pentium III Specification Update for a
listing of processors that support both VRM specifications.
Table 2.
Voltage Identification Definition 1, 2
VID3
VID2
VID1
VID0
VccCORE
1111
1.30
1110
1.35
1101
1.40
1100
1.45
1011
1.50
1010
1.55
1001
1.603
1000
1.653
0111
1.703
0110
1.753
0101
1.80 3
0100
1.85 3
0011
1.90 3
0010
1.95 3
0001
2.00 3
0000
2.05 3
1111
No Core