参数资料
型号: C8051F930-TB
厂商: Silicon Laboratories Inc
文件页数: 16/25页
文件大小: 0K
描述: BOARD TARGET/PROTO W/C8051F930
产品培训模块: C8051F9xx Lower Power MCUs
视频文件: Designing for Low Power Operation
特色产品: C8051F91x/0x MCU Series Development Kit
标准包装: 1
类型: MCU
适用于相关产品: C8051F930
所含物品:
产品目录页面: 626 (CN2011-ZH PDF)
相关产品: 336-1467-ND - IC 8051 MCU 64K FLASH 32-QFN
336-1466-ND - IC 8051 MCU 64K FLASH 32-LQFP
其它名称: 336-1472
C8051F93x/92x
5.6. Expansion I/O Connector (P1)
The 96-pin Expansion I/O connector P1 provides access to all signal pins of the C8051F930 device (except the C2
debug interface signals). In addition, power supply and ground pins are included. A small through-hole prototyping
area is also provided. See Table 2 for a list of pin descriptions for P1.
Table 2. P1 Pin Descriptions
Row A
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Description
+3 VD
nc
nc
nc
nc
nc
nc
nc
nc
nc
P0.5/RX
P0.2H
P1.7/AD7
P1.4/AD4
P1.1/AD1
A6-Latch
A3-Latch
A0-Latch
nc
P2.2/A10
/WR
P2.3/A11
P2.0/A8
nc
nc
GND
nc
nc
nc
nc
nc
nc
Row B
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Description
GND
nc
nc
nc
nc
nc
nc
nc
nc
P0.7/IREF0
P0.4/TX
P0.1/AGND
P1.6/AD6
P1.3/AD3
P1.0/AD0
A5-Latch
A2-Latch
P2.3/A11
nc
P2.1/A9
/RD
P2.2/A10
ALE
nc
GND
nc
nc
VDD/DC+
nc
nc
nc
GND
Row C
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Description
nc
nc
nc
nc
nc
nc
nc
nc
nc
P0.6/CNVSTR
P0.3H
P0.0/VREF
P1.5/AD5
P1.2/AD2
A7-Latch
A4-Latch
A1-Latch
nc
P2.3/A11
P2.0/A8
P0.2H
P2.1/A9
nc
nc
nc
nc
nc
VBAT
nc
nc
nc
nc
16
Rev. 0.6
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