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参数资料
| 型号： | CAT1027YI-28-GT3 |
| 元件分类： | 电源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封装： | ROHS COMPLIANT, MO-153, TSSOP-8 |
| 文件页数： | 2/20页 |
| 文件大小： | 241K |
| 代理商： | CAT1027YI-28-GT3 |
CAT1026, CAT1027
Doc. No. MD-3010 Rev. M
10
Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ACKNOWLEDGE
After a successful data transfer, each receiving
device is required to generate an acknowledge. The
acknowledging device pulls down the SDA line
during the ninth clock cycle, signaling that it received
the 8 bits of data.
The CAT1026 and CAT1027 respond with an
acknowledge after receiving a START condition and
its slave address. If the device has been selected
along with a write operation, it responds with an
acknowledge after receiving each 8-bit byte.
When the CAT1026 and CAT1027 begin a READ
mode it transmits 8 bits of data, releases the SDA
line and monitors the line for an acknowledge. Once
it receives this acknowledge, the CAT1026 and
CAT1027 will continue to transmit data. If no
acknowledge is sent by the Master, the device
terminates data transmission and waits for a STOP
condition.
WRITE OPERATIONS
Byte Write
In the Byte Write mode, the Master device sends the
START condition and the slave address information
(with the R/W
bit set to zero) to the Slave device. After
the Slave generates an acknowledge, the Master sends
a 8-bit address that is to be written into the address
pointers of the device. After receiving another acknow-
ledge from the Slave, the Master device transmits the
data to be written into the addressed memory location.
The CAT1026 and CAT1027 acknowledge once more
and the Master generates the STOP condition. At this
time, the device begins an internal programming cycle
to non-volatile memory. While the cycle is in progress,
the device will not respond to any request from the
Master device.
Figure 5. Start/Stop Timing
Figure 6. Acknowledge Timing
Figure 7: Slave Address Bits
START BIT
SDA
STOP BIT
SCL
ACKNOWLEDGE
1
START
SCL FROM
MASTER
89
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
1
01
0
R/W
Default Configuration
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CAT1027YI-28-T3 | 制造商:ON Semiconductor 功能描述:CPU SUPERVISOR WITH 2K EEPROM - Tape and Reel |
| CAT1027YI30 | 制造商:ON Semiconductor 功能描述:CPU SUPERVISOR WITH 2K EEPROM - Rail/Tube |
| CAT1027YI-30-GT3 | 功能描述:监控电路 CPU SUP W/2K EEPROM RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| CAT1027YI-30-T3 | 制造商:ON Semiconductor 功能描述:CPU SUPERVISOR WITH 2K EEPROM - Tape and Reel |
| CAT1027YI42 | 制造商:ON Semiconductor 功能描述:CPU SUPERVISOR WITH 2K EEPROM - Rail/Tube |
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