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参数资料
| 型号： | CAT1320WI-42-T3 |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/18页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR W/MEM 4.25V 8SOIC |
| 标准包装： | 1 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 低有效 |
| 复位超时： | 最小为 130 ms |
| 电压 - 阀值： | 4.25V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 标准包装 |
| 其它名称： | CAT1320WI-42-T3DKR CAT1320WI-42-TE13DKR CAT1320WI-42-TE13DKR-ND |
CAT1320, CAT1321
BUS ACTIVITY:
MASTER
S
T
A
R
T
SLAVE
ADDRESS
BYTE ADDRESS
A15–A8 A7–A0
DATA
S
T
O
P
SDA LINE
* = Don’t Care Bit
S
A
C
K
** * *
A
C
K
A
C
K
A
C
K
P
Figure 8. Byte Write Timing
BUS
S
T
ACTIVITY: A
MASTER R
T
SLAVE
ADDRESS
BYTE ADDRESS
A15–A8 A7–A0
DATA
DATA n
DATA n+63
S
T
O
P
SDA LINE S
* = Don’t Care Bit
A
C
K
****
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
P
Figure 9. Page Write Timing
Acknowledge Polling
Disabling of the inputs can be used to take advantage of
the typical write cycle time. Once the stop condition is issued
to indicate the end of the host’s write operation, the
CAT1320/21 initiates the internal write cycle. ACK polling
can be initiated immediately. This involves issuing the start
condition followed by the slave address for a write
operation. If the device is still busy with the write operation,
no ACK will be returned. If a write operation has completed,
an ACK will be returned and the host can then proceed with
the next read or write operation.
S
T
Read Operations
The READ operation for the CAT1320/21 is initiated in
the same manner as the write operation with one exception,
that R/W bit is set to one. Three different READ operations
are possible: Immediate/Current Address READ,
Selective/Random READ and Sequential READ.
S
BUS ACTIVITY:
MASTER
SDA LINE
A
R
T
S
SLAVE
ADDRESS
A
C
DATA
N
O
T
O
P
P
K
A
C
K
SCL
SDA
8
8TH BIT
9
DATA OUT
NO ACK
STOP
Figure 10. Immediate Address Read Timing
http://onsemi.com
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