参数资料
型号: CAT24WC02RE-REV-F
元件分类: PROM
英文描述: 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
封装: MO-187AA, MSOP-8
文件页数: 13/14页
文件大小: 505K
代理商: CAT24WC02RE-REV-F
CAT24WC01/02/04/08/16
8
Doc. No. 1022, Rev. N
2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
5020 FHD F10
Figure 8. Immediate Address Read Timing
SCL
SDA
8TH BIT
STOP
NO ACK
DATA OUT
89
SLAVE
ADDRESS
S
A
C
K
DATA
N
O
A
C
K
S
T
O
P
BUS ACTIVITY:
MASTER
SDA LINE
S
T
A
R
T
Selective Read
Selective READ operations allow the Master device to
select at random any memory location for a READ
operation. The Master device first performs a ‘dummy’
write operation by sending the START condition, slave
address and byte address of the location it wishes to
read. After the CAT24WC01/02/04/08/16 acknowledge
the word address, the Master device resends the START
condition and the slave address, this time with the R/
W
bit set to one. The CAT24WC01/02/04/08/16 then
responds with its acknowledge and sends the 8-bit byte
requested. The master device does not send an
acknowledge but will generate a STOP condition.
Sequential Read
The Sequential READ operation can be initiated by
either the immediate Address READ or Selective READ
operations. After the 24WC01/02/04/08/16 sends initial
8-bit byte requested, the Master will respond with an
acknowledge which tells the device it requires more
data. The CAT24WC01/02/04/08/16 will continue to
output an 8-bit byte for each acknowledge sent by the
Master. The operation is terminated when the Master
fails to respond with an acknowledge, thus sending the
STOP condition.
The data being transmitted from the CAT24WC01/02/
04/08/16 is outputted sequentially with data from address
N followed by data from address N+1. The READ
operation address counter increments all of the
CAT24WC01/02/04/08/16 address bits so that the entire
memory array can be read during one operation. If more
than the E (where E = 255 for 24WC02, 511 for 24WC04,
1023 for 24WC08, and 2047 for 24WC16) bytes are read
out, the counter will “wrap around” and continue to clock
out data bytes. If N = E (where E = 127 for the
CAT24WC01) the counter will not 'wrap around'.
相关PDF资料
PDF描述
CAT24WC02U-1.8REV-C 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
CAT24WC02YA-1.8REV-E 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
CAT24WC02WE-1.8REV-E 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
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