参数资料
型号: CDB4265
厂商: Cirrus Logic Inc
文件页数: 30/46页
文件大小: 0K
描述: BOARD EVAL FOR CS4265 CODEC
标准包装: 1
主要目的: 音频编解码器
嵌入式:
已用 IC / 零件: CS4265
主要属性: 立体声 24 位 192 kHz 采样率
次要属性: 图形用户界面,S/PDIF/ I2S / I2C / SPI 接口
已供物品: 板,缆线,CD
产品目录页面: 754 (CN2011-ZH PDF)
相关产品: CS4265-DNZR-ND - IC CODEC 24BIT 104DB 32-QFN
CS4265-DNZ-ND - IC CODEC 24BIT 104DB 32-QFN
598-1039-ND - IC CODEC 24BIT 104DB 32QFN
其它名称: 598-1001
36
DS657F3
CS4265
6. REGISTER DESCRIPTION
6.1
Chip ID - Register 01h
Function:
This register is Read-Only. Bits 7 through 4 are the part number ID, which is 1101b (0Dh), and the remaining
bits (3 through 0) indicate the device revision as shown in Table 5 below.
6.2
Power Control - Address 02h
6.2.1
Freeze (Bit 7)
Function:
This function allows modifications to be made to certain control port bits without the changes taking effect
until the Freeze bit is disabled. To make multiple changes to these bits take effect simultaneously, set the
Freeze bit, make all changes, then clear the Freeze bit. The bits affected by the Freeze function are listed
6.2.2
Power-Down MIC (Bit 3)
Function:
The microphone preamplifier block will enter a low-power state whenever this bit is set.
6.2.3
Power-Down ADC (Bit 2)
Function:
The ADC pair will remain in a reset state whenever this bit is set.
76
543
21
0
PART3
PART2
PART1
PART0
REV3
REV2
REV1
REV0
REV[2:0]
Revision
001
A
010
B, C0
011
C1
Table 5. Device Revision
76
543
21
0
Freeze
Reserved
PDN_MIC
PDN_ADC
PDN_DAC
PDN
Name
Register
Bit(s)
MuteDAC
03h
2
MuteADC
04h
2
Gain[5:0]
07h
5:0
Gain[5:0]
08h
5:0
Vol[7:0]
0Ah
7:0
Vol[7:0]
0Bh
7:0
TxMute
0Eh
4
Table 6. Freeze-able Bits
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