参数资料
型号: CDB4354
厂商: Cirrus Logic Inc
文件页数: 19/24页
文件大小: 0K
描述: EVAL BOARD 5V DAC 2VRMS LINEDVR
标准包装: 1
DAC 的数量: 1
位数: 24
采样率(每秒): 192k
数据接口: I²S,串行
DAC 型: 电压
工作温度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: CS4354
产品目录页面: 757 (CN2011-ZH PDF)
其它名称: 598-1809
CDB4354-ND
4
DS895F2
CS4354
1. PIN DESCRIPTIONS
Pin Name Pin #
Pin Description
VL
1
Serial Audio Interface Power (Input) - Positive power for the serial audio interface.
SDIN
2
Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
MCLK
3
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
LRCK
4
Left / Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial
audio data line.
SCLK/DEM
5
Serial Clock (Input) - Serial clock for the serial audio interface.
FILT+
7
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
AOUTA
AOUTB
8
9
Analog Outputs (Output) - The full-scale analog line output level is specified in the Analog Characteris-
tics table.
GND
6, 10 Ground (Input) - Ground reference. See Section 4.10 on page 18 for layout considerations.
VA
11
Analog, Charge Pump, and Regulator Power (Input) - Positive power supply for the analog, inverting
charge pump, and regulator for the digital core logic sections.
FLYP
FLYN
12
13
Inverting Charge Pump Cap Positive/Negative Nodes (Output) - Positive and Negative nodes for the
inverting charge pump’s flying capacitor.
-VFILT
14
Inverting Charge Pump Filter Connection (Output) - Power supply from the inverting charge pump that
provides the negative rail for the output amplifiers.
VL
-VFILT
SDIN
FLYN
MCLK
FLYP
LRCK
VA
SCLK/DEM
GND
AOUTB
FILT+
AOUTA
1
2
3
4
5
6
7
9
10
11
12
13
14
8
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