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| 型号： | CH5001A-L |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS COLOR DIGITAL VIDEO CAMERA |
| 中文描述： | CMOS彩色数码摄像机 |
| 文件页数： | 8/34页 |
| 文件大小： | 136K |
| 代理商： | CH5001A-L |
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8
201-0000-032 Rev 3.0, 6/2/99
CHRONTEL
CH5001A
Automatic Shutter, Gain and Black Setting:
The CH5001 contains circuitry to automatically adjust the shutter (ESLE, ESLH and ESLL), programmable gain
(PGSH[2:0]) and black level (BCLMP[7:0]. These feedback loops are independently controlled by the three control
bits Auto-Shutter Shutter Enable (ASSE), Auto-Shutter Gain Enable (ASGE) and Auto-Shutter Black Enable
(ASBE). When each of these loops is enabled (default), a read to the corresponding shutter, gain or black level reg-
ister will result is a readout of the control signal the algorithm has determined to be correct. Data can continue to be
written to the control registers, but will not have an effect until the automatic feedback control is disabled. The
feedback loops will attempt to force a percentage of the image (controlled by ASBC[4:0] and ASBT[2:0]) to black,
and a certain percentage of the image (controlled by ASWC[7:0]) inside the selectable window to white. This will
create an output image which maximizes the dynamic range of the signal, without creating overflow or underflow
problems within the A/D or the datapath.
Timing signal generation:
The CH5001 generates all required internal and external timing signals. The following timing signals are output by
the CH5001:
Clock out (CLKOUT) - This output is used to latch the outputs of the Y]7:0], C[7:0], CRS, HS*, VS* and
HREF.
Cr Select (CRS) - The Cr Select signal determines whether the chroma sample being output is a Cr or Cb data.
Horizontal Sync (HS*) - The horizontal sync output is used to determine the start of a new line. Polarity is
selectable via control bit HSP.
Vertical Sync (VS*) - The vertical sync output is used to determine the start of a new frame. Polarity is
selectable via control bit VSP.
Horizontal Reference (HREF) - The horizontal reference is high when active data is output from the CH5001.
The following timing parameters are programmable:
Shutter - This control is divided among three registers, Electronic Shutter Length Extended (ESLE) ,
Electronic Shutter Length High (ESLH) and Electronic Shutter Length Low (ESLL). The control range is
from ~1uS, to just under the frame duration.
Frame rate - In non-CCIR601 modes, the frame rate is selectable via the FR register. The CH5001 has two
methods for adjusting the frame rate of the device.
Horizontal start - In non-CCIR601 modes, the delay between the HS* output and the output of active data
from the CH5001 is programmable via the HS register. The polarity of this output is programmable.
Vertical start - In non-CCIR601 modes, the delay between the VS* output and the output of active data from
the CH5001 is programmable via the VS register. The polarity of this output is programmable.
Frame rate adjustment method — The CH5001 has two methods for adjusting the frame rate of the device.
The first method is to add additional black lines to each frame after reading out the active data. The second
method is to have each frame remain a constant number of lines long, and have each line contain a variable
number of blank pixels after reading out the active data. In this mode, all clock signals are 1/2 of the normal
rate.
Auto shutter speed — The auto-shutter loop speed can be controlled via ASSPD[2:0].
Bus control:
The CH5001 is controlled via a 2 pin serial interface. The description of this interface, and all registers accessible
via the interface is described later in the data sheet.
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