参数资料
型号: CH7003B-V
厂商: Electronic Theatre Controls, Inc.
英文描述: Digital PC to TV Encoder
中文描述: 数码电脑电视编码器
文件页数: 14/50页
文件大小: 334K
代理商: CH7003B-V
CHRONTEL
CH7003B
14
201-0000-023 Rev.4.1, 8/2/99
Anti-flicker Filter
(continued)
and three levels of flicker filtering). These modes are fully programmable via I
2
C, and are listed under the flicker
filter register.
Internal Voltage Reference
An on-chip bandgap circuit is used in the DAC to generate a reference voltage which, in conjunction with a
reference resistor at pin RSET, and register controlled divider, sets the output ranges of the DACs. The CH7003
bandgap reference voltage is 1.235 volts nominal for NTSC or PAL-M, or 1.317 volts nominal (for PAL or NTSC-
J), which is determined by IDF register bit 6 (DACG bit). The recommended value for the reference resistor RSET
is 360 ohms (though this may be adjusted in order to achieve a different output level). The gain setting for DAC
output is 1/48
th
. Therefore, for each DAC, the current output per LSB step is determined by the following equation:
I
LSB
= V(RSET)/RSET reference resistor* 1/GAIN
For DACG=0, this is: I
LSB
= 1.235/360 * 1/48 = 71.4
μ
A (nominal)
For DACG=1, this is: I
LSB
= 1.317/360 * 1/48 = 76.2
μ
A (nominal)
Power Management
The CH7003 supports five operating states including Normal [On], Power Down, Full Power Down, S-Video Off,
and Composite Off to provide optimal power consumption for the application involved. Using the programmable
power down modes accessed over the I
2
C port, the CH7003 may be placed in either Normal state, or any of the four
power managed states, as listed below (see
Power Management Register” under the
Register Descriptions
section
for programming information). To support power management, a TV sensing function (see “Connection Detect
Register” under the
Register Descriptions
section) is provided, which identifies whether a TV is connected to either
S-Video or composite (or neither). This sensing function can then be used to enter into the appropriate operating
state (e.g., if TV is sensed only on composite, the S-Video Off mode could be set by software).
Luminance and Chrominance Filter Options
The CH7003 contains a set of luminance filters to provide a controllable bandwidth output on both CVBS and
S-Video outputs. All values are completely programmable via the Video Bandwidth Register. For all graphs shown,
the horizontal axis is frequency in MHz, and the vertical axis is gain in dBs. The composite luminance and
chrominance video bandwidth output is shown in
Table 13
.
Table 12. Power Management
Operating State
Normal (On):
Power Down:
Functional Description
In the normal operating state, all functions and pins are active
In the power-down state, most pins and circuitry are disabled.The BCO
pin will continue to provide either the VCO divided by K3, or 14.318
MHz out.
Power is shut off to the unused DAC’s associated with S-Video
outputs.
In Composite-off state, power is shut off to the unused DAC associated
with CVBS output.
In this power-down state, all but the I
2
C circuits are disabled. This
places the CH7003 in its lowest power consumption mode.
S-Video Off:
Composite Off:
Full Power Down:
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